Patents by Inventor Steven T. Mayer
Steven T. Mayer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10954605Abstract: An apparatus for continuous simultaneous electroplating of two metals having substantially different standard electrodeposition potentials (e.g., for deposition of Sn—Ag alloys) comprises an anode chamber for containing an anolyte comprising ions of a first, less noble metal, (e.g., tin), but not of a second, more noble, metal (e.g., silver) and an active anode; a cathode chamber for containing catholyte including ions of a first metal (e.g., tin), ions of a second, more noble, metal (e.g., silver), and the substrate; a separation structure positioned between the anode chamber and the cathode chamber, where the separation structure substantially prevents transfer of more noble metal from catholyte to the anolyte; and fluidic features and an associated controller coupled to the apparatus and configured to perform continuous electroplating, while maintaining substantially constant concentrations of plating bath components for extended periods of use.Type: GrantFiled: September 5, 2018Date of Patent: March 23, 2021Assignee: Novellus Systems, Inc.Inventors: Lee Peng Chua, Steven T. Mayer, David W. Porter, Thomas A. Ponnuswamy
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Patent number: 10920335Abstract: Methods of electroplating metal on a substrate while controlling azimuthal uniformity, include, in one aspect, providing the substrate to the electroplating apparatus configured for rotating the substrate during electroplating, and electroplating the metal on the substrate while rotating the substrate relative to a shield such that a selected portion of the substrate at a selected azimuthal position dwells in a shielded area for a different amount of time than a second portion of the substrate having the same average arc length and the same average radial position and residing at a different angular (azimuthal) position. The shield is positioned in close proximity of the substrate (e.g., within a distance that is equal to 0.1 of the substrate's radius). The shield in some embodiments may be an ionically resistive ionically permeable element having an azimuthally asymmetric distribution of channels.Type: GrantFiled: June 13, 2018Date of Patent: February 16, 2021Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, David W. Porter, Bryan L. Buckalew, Robert Rash
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Patent number: 10923340Abstract: An apparatus for electroplating metal on a semiconductor substrate with improved plating uniformity includes in one aspect: a plating chamber configured to contain an electrolyte and an anode; a substrate holder configured to hold the semiconductor substrate; and an ionically resistive ionically permeable element comprising a substantially planar substrate-facing surface and an opposing surface, wherein the element allows for flow of ionic current towards the substrate during electroplating, and wherein the element comprises a region having varied local resistivity. In one example the resistivity of the element is varied by varying the thickness of the element. In some embodiments the thickness of the element is gradually reduced in a radial direction from the edge of the element to the center of the element. The provided apparatus and methods are particularly useful for electroplating metal in WLP recessed features.Type: GrantFiled: June 1, 2018Date of Patent: February 16, 2021Assignee: Lam Research CorporationInventors: Burhanuddin Kagajwala, Bryan L. Buckalew, Lee Peng Chua, Aaron Berke, Robert Rash, Steven T. Mayer
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Patent number: 10840101Abstract: Disclosed are pre-wetting apparatus designs and methods. These apparatus designs and methods are used to pre-wet a wafer prior to plating a metal on the surface of the wafer. Disclosed compositions of the pre-wetting fluid prevent corrosion of a seed layer on the wafer and also improve the filling rates of features on the wafer.Type: GrantFiled: November 20, 2017Date of Patent: November 17, 2020Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, David W. Porter, Mark J. Willey
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Patent number: 10774438Abstract: Methods of and apparatuses for monitoring electroplating bath quality in electroplating cells using voltage readings are described herein. Methods involve obtaining real-time voltage readings during an electroplating process and determining whether the voltage readings are within a threshold deviation of an expected voltage reading at a given time.Type: GrantFiled: September 14, 2018Date of Patent: September 15, 2020Assignee: Lam Research CorporationInventors: Matthew Sherman Thorum, Steven T. Mayer
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Publication number: 20200279754Abstract: In one implementation a cathode for electrochemical metal removal has a generally disc-shaped body and a plurality of channels in the generally disc-shaped body, where the channels are configured for passing electrolyte through the body of the cathode. The channels may be fitted with non-conductive (e.g., plastic) tubes that in some embodiments extend above the body of the cathode to a height of at least 1 cm. The cathode may also include a plurality of indentations at the edge to facilitate electrolyte flow at the edge of the cathode. In some embodiments the cathode includes a plurality of non-conductive fixation elements on a conductive surface of the cathode, where the fixation elements are attachable to one or more handles for removing the cathode from the electrochemical metal removal apparatus.Type: ApplicationFiled: May 15, 2020Publication date: September 3, 2020Inventors: Kari Thorkelsson, Richard G. Abraham, Steven T. Mayer
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Patent number: 10714436Abstract: Systems and methods for achieving uniformity across a redistribution layer are described. One of the methods includes patterning a photoresist layer over a substrate. The patterning defines a region for a conductive line and a via disposed below the region for the conductive line. The method further includes depositing a conductive material in between the patterned photoresist layer, such that the conductive material fills the via and the region for the conductive line. The depositing causes an overgrowth of conductive material of the conductive line to form a bump of the conductive material over the via. The method also includes planarizing a top surface of the conductive line while maintaining the patterned photoresist layer present over the substrate. The planarizing is facilitated by exerting a horizontal shear force over the conductive line and the bump. The planarizing is performed to flatten the bump.Type: GrantFiled: March 14, 2017Date of Patent: July 14, 2020Assignee: Lam Research CorporationInventors: Bryan L. Buckalew, Thomas A. Ponnuswamy, Steven T. Mayer, Stephen J. Banik, II, Justin Oberst
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Patent number: 10692735Abstract: In one implementation a wafer processing method includes filling a plurality of through-resist recessed features with a metal, such that a ratio of fill rate of a first feature to a fill rate of a second feature is R1; followed by electrochemically removing metal such that a ratio of metal removal rate from the first feature to the metal removal rate from the second feature is greater than R1, improving the uniformity of the fill. In some embodiments the method includes contacting an anodically biased substrate with an electrolyte such that the electrolyte has a transverse flow component in a direction that is substantially parallel to the working surface of the substrate. The method can be implemented in an apparatus that is configured for generating the transverse flow at the surface of the substrate. In some implementations the method makes use of distinct electrochemical regimes to achieve improvement in uniformity.Type: GrantFiled: July 19, 2018Date of Patent: June 23, 2020Assignee: Lam Research CorporationInventors: Kari Thorkelsson, Richard G. Abraham, Steven T. Mayer
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Patent number: 10669644Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: GrantFiled: July 30, 2019Date of Patent: June 2, 2020Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 10662545Abstract: Methods and apparatus for electroplating material onto a substrate are provided. In many cases the material is metal and the substrate is a semiconductor wafer, though the embodiments are no so limited. Typically, the embodiments herein utilize a porous ionically resistive plate positioned near the substrate, the plate having a plurality of interconnecting 3D channels and creating a cross flow manifold defined on the bottom by the plate, on the top by the substrate, and on the sides by a cross flow confinement ring. During plating, fluid enters the cross flow manifold both upward through channels in the plate, and laterally through a cross flow side inlet positioned on one side of the cross flow confinement ring. The flow paths combine in the cross flow manifold and exit at the cross flow exit, which is positioned opposite the cross flow inlet. These combined flow paths result in improved plating uniformity.Type: GrantFiled: October 31, 2017Date of Patent: May 26, 2020Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Bryan L. Buckalew, Haiying Fu, Thomas Ponnuswamy, Hilton Diaz Camilo, Robert Rash, David W. Porter
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Publication number: 20200115816Abstract: Provided are cleaning methods and systems to remove unintended metallic deposits from electroplating apparatuses using reverse current deplating techniques. Such cleaning involves positioning a cleaning (deplating) disk in an electroplating cup similar to a regular processed substrate. The front surface of the cleaning disk includes a corrosion resistant conductive material to form electrical connections to deposits on the cup's surfaces. The disk is sealed in the cup and submerged into a plating solution. A reverse current is then applied to the front conductive surface of the disk to initiate deplating of the deposits. Sealing compression in the cup may change during cleaning to cause different deformation of the lip seal and to form new electrical connections to the deposits. The proposed cleaning may be applied to remove deposits formed during electroplating of alloys, in particular, tin-silver alloys widely used for semiconductor and wafer level packaging.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: Lee Peng Chua, Steven T. Mayer, Thomas A. Ponnuswamy, Santosh Kumar
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Patent number: 10538855Abstract: Provided are cleaning methods and systems to remove unintended metallic deposits from electroplating apparatuses using reverse current deplating techniques. Such cleaning involves positioning a cleaning (deplating) disk in an electroplating cup similar to a regular processed substrate. The front surface of the cleaning disk includes a corrosion resistant conductive material to form electrical connections to deposits on the cup's surfaces. The disk is sealed in the cup and submerged into a plating solution. A reverse current is then applied to the front conductive surface of the disk to initiate deplating of the deposits. Sealing compression in the cup may change during cleaning to cause different deformation of the lip seal and to form new electrical connections to the deposits. The proposed cleaning may be applied to remove deposits formed during electroplating of alloys, in particular, tin-silver alloys widely used for semiconductor and wafer level packaging.Type: GrantFiled: September 26, 2016Date of Patent: January 21, 2020Assignee: Novellus Systems, Inc.Inventors: Lee Peng Chua, Steven T. Mayer, Thomas A. Ponnuswamy, Santosh Kumar
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Publication number: 20200011914Abstract: A device for measuring electrical properties of electrical contacts within an electroplating apparatus has a disc-shaped structure like that of a wafer. Multiple conductive pads are formed to collectively circumscribe an outer periphery of the disc-shaped structure. Adjacently positioned ones of the conductive pads are electrically isolated from each other. The device includes a current source that supplies electric current at a first terminal and sinks electric current at a second terminal. The device includes measurement circuitry, having first and second input terminals, that determines a value of an electrical parameter based on signals present at the first and second input terminals. The device includes switching circuitry for connecting selected ones of the conductive pads to the first and second terminals of the current source and to the first and second input terminals of the measurement circuitry at a given time. The device also includes an onboard power supply.Type: ApplicationFiled: September 17, 2019Publication date: January 9, 2020Inventors: Mark E. Emerson, Steven T. Mayer, Lawrence Ossowski
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Patent number: 10508359Abstract: The embodiments herein relate to methods and apparatus for determining whether a particular test bath is able to successfully fill a feature on a substrate. In various cases, the substrate is a semiconductor substrate and the feature is a through-silicon-via. Generally, two experiments are used: a first experiment simulates the conditions present in a field region of the substrate during the fill process, and the second experiment simulates the conditions present in a feature on the substrate during the fill process. The output from these experiments may be used with various techniques to predict whether the particular bath will result in an adequately filled feature.Type: GrantFiled: May 9, 2017Date of Patent: December 17, 2019Assignee: Lam Research CorporationInventors: Lee Brogan, Steven T. Mayer, Matthew Thorum, Joseph Richardson, David W. Porter, Haiying Fu
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Publication number: 20190352792Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: ApplicationFiled: July 30, 2019Publication date: November 21, 2019Inventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 10472730Abstract: An electroplating apparatus for filling recessed features on a semiconductor substrate includes a vessel configured to maintain a concentrated electroplating solution at a temperature of at least about 40° C., wherein the solution would have formed a precipitate at 20° C. This vessel is in fluidic communication with an electroplating cell configured for bringing the concentrated electrolyte in contact with the semiconductor substrate at a temperature of at least about 40° C., or the vessel is the electroplating cell. In order to prevent precipitation of metal salts from the electrolyte, the apparatus further includes a controller having program instructions for adding a diluent to the concentrated electroplating solution in the vessel to avoid precipitation of a salt from the concentrated electroplating solution in response to a signal indicating that the electrolyte is at risk of precipitation.Type: GrantFiled: July 15, 2015Date of Patent: November 12, 2019Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Jonathan David Reid, Seshasayee Varadarajan
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Patent number: 10436829Abstract: A device for measuring electrical properties of electrical contacts within an electroplating apparatus has a disc-shaped structure like that of a wafer. Multiple conductive pads are formed to collectively circumscribe an outer periphery of the disc-shaped structure. Adjacently positioned ones of the conductive pads are electrically isolated from each other. The device includes a current source that supplies electric current at a first terminal and sinks electric current at a second terminal. The device includes measurement circuitry, having first and second input terminals, that determines a value of an electrical parameter based on signals present at the first and second input terminals. The device includes switching circuitry for connecting selected ones of the conductive pads to the first and second terminals of the current source and to the first and second input terminals of the measurement circuitry at a given time. The device also includes an onboard power supply.Type: GrantFiled: April 18, 2017Date of Patent: October 8, 2019Assignee: Lam Research CorporationInventors: Mark E. Emerson, Steven T. Mayer, Lawrence Ossowski
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Publication number: 20190301042Abstract: The embodiments herein relate to methods and apparatus for electroplating one or more materials onto a substrate. Typically, the embodiments herein utilize a channeled plate positioned near the substrate, creating a cross flow manifold between the channeled plate and substrate, and on the sides by a flow confinement ring. A seal may be provided between the bottom surface of a substrate holder and the top surface of an element below the substrate holder (e.g., the flow confinement ring). During plating, fluid enters the cross flow manifold through channels in the channeled plate, and through a cross flow inlet, then exits at the cross flow exit, positioned opposite the cross flow inlet. The apparatus may switch between a sealed state and an unsealed state during electroplating, for example by lowering and lifting the substrate and substrate holder as appropriate to engage and disengage the seal.Type: ApplicationFiled: June 5, 2019Publication date: October 3, 2019Inventors: Kari Thorkelsson, Aaron Berke, Bryan L. Buckalew, Steven T. Mayer
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Patent number: 10416092Abstract: Methods and apparatus for detecting the presence or absence of unwanted metal deposits on a substrate holder of an electroplating apparatus are described herein. In various embodiments, a plating sensor is used to detect unwanted metal deposits. The plating sensor may be mounted relatively far away from the area that it measures (e.g., the sensor target area). For instance, the plating sensor may be on one side of the electroplating apparatus (in some cases mounted on a drip shield), and the sensor target area may be on the opposite side of the electroplating apparatus. In this way, the plating sensor can measure across the electroplating apparatus. This placement provides a relatively deep depth of focus for the plating sensor, and provides some physical separation between the plating sensor and the electroplating chemistry. Both of these factors lead to more reliable detection results.Type: GrantFiled: June 29, 2017Date of Patent: September 17, 2019Assignee: Lam Research CorporationInventors: Rajan Arora, Jared Herr, Jason Daniel Marchetti, Steven T. Mayer, James R. Zibrida
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Patent number: 10407794Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: GrantFiled: December 20, 2018Date of Patent: September 10, 2019Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer