Patents by Inventor Sumio Utsunomiya
Sumio Utsunomiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080180407Abstract: An input-capable display device includes a first substrate, a second substrate, a detection electrode, a dielectric film, and a detector. A pair of electrodes that drive a liquid crystal layer are provided on the first substrate. The second substrate is opposed to the first substrate through the liquid crystal layer. The detection electrode and the dielectric film are laminated on an outer surface of the second substrate. The detector detects a position at which an electrostatic capacitance is formed with the detection electrode through the dielectric film. The second substrate includes a shield conductor that is formed on a side adjacent to the liquid crystal layer. An electric potential of the shield conductor is fixed.Type: ApplicationFiled: December 14, 2007Publication date: July 31, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Sumio UTSUNOMIYA, Takeshi KOSHIHARA, Takeyoshi USHIKI, Yoichi FUJIKAWA
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Publication number: 20080090388Abstract: A method for fabricating a semiconductor device, comprising: forming a semiconductor film on a substrate; and recrystallizing the semiconductor film using as a heat source flame of a gas burner that uses hydrogen and oxygen gas mixture as a fuel.Type: ApplicationFiled: October 5, 2007Publication date: April 17, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Mitsuru Sato, Sumio Utsunomiya
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Publication number: 20080087213Abstract: A method for fabricating a semiconductor device including: a step of forming a first film on a substrate; and a step of performing a thermal process by scanning the first film with a flame of a gas burner using a hydrogen and oxygen gas mixture as a fuel, wherein the flame of the gas burner is approximately linear.Type: ApplicationFiled: October 5, 2007Publication date: April 17, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Mitsuru Sato, Sumio Utsunomiya
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Patent number: 7341894Abstract: In a semiconductor device made by forming functional elements on a first substrate, transferring the element chip onto a second substrate, and connecting first pads on the element chip to second pads on the second substrate, the area or the width of the first is increased. The first pads can be securely connected to the second pads even when misalignment occurs during the separating and transferring processes. Only the first pads are formed on a surface of the element chip at the second-substrate-side. The functional elements are formed to be farther from the second substrate than the first pads. Alternatively, only the first pads are formed on a surface of the element chip remote from the second substrate, and the functional elements are formed to be closer to the second substrate than the first pads. Alternatively, the first pads are formed on both the surface of the element chip at the second-substrate-side and the surface of the element chip remote from the second substrate.Type: GrantFiled: August 4, 2005Date of Patent: March 11, 2008Assignee: Seiko Epson CorporationInventors: Mitsumi Kimura, Sumio Utsunomiya, Hiroyuki Hara, Wakao Miyazawa
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Patent number: 7342354Abstract: To provide a sheet-shaped organic EL display device having a reduced thickness, an organic EL display device includes a substrate serving as both a protective layer to reduce or prevent permeation of moisture, oxygen, and the like into the inside and a support layer for film formation, a laminate which is provided on a under layer by film formation and which includes a thin film circuit layer carrying an electric circuit and an organic EL light emitting layer carrying an organic EL light emitting element, and an adhesive layer joining the above-described laminate and the above-described substrate. The above-described organic EL light emitting element radiates the emitted light toward the above-described under layer side. In this manner, a low-profile organic EL display device can be provided.Type: GrantFiled: May 21, 2004Date of Patent: March 11, 2008Assignee: Seiko Epson CorporationInventors: Sumio Utsunomiya, Tomoyuki Kamakura
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Publication number: 20070287242Abstract: A technique is described in which a layer to be transferred is easily peeled and transferred to a transferred body that is pliable or flexible. Also, a method of fabricating a semiconductor device using these peeling and transfer techniques, and electronic equipment fabricated with the semiconductor device is described. A transfer method in which a layer to be transferred formed on a substrate is transferred to a transfer body that is pliable or flexible includes the first step of forming a layer to be transferred on a substrate; the second step of bonding the layer to be transferred formed on the substrate to a transfer body that is pliable or flexible fixed on a fixture; and the third step of peeling the layer to be transferred from the substrate and transferring the layer to be transferred to the transfer body.Type: ApplicationFiled: July 24, 2007Publication date: December 13, 2007Applicant: Seiko Epson CorporationInventors: Taimei Kodaira, Sumio Utsunomiya
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Publication number: 20070232034Abstract: A method for manufacturing a semiconductor device, includes: a) spraying a combusted gas onto a member containing a metal element, the combusted gas being obtained by combusting a mixed gas that at least includes a gas containing a hydrogen atom and an oxygen gas; b) spraying the combusted gas onto the amorphous semiconductor film placed on a substrate having an insulating surface thereof; and c) adding the metal element to at least a vicinity of a surface of the amorphous semiconductor film to enhance recrystallization of a semiconductor.Type: ApplicationFiled: March 7, 2007Publication date: October 4, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Sumio UTSUNOMIYA
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Publication number: 20070224741Abstract: A method of manufacturing a semiconductor element includes: (a) preparing a first substrate provided with a plurality of protruding sections formed on a surface of the first substrate and a second substrate provided with a semiconductor film formed on a surface of the second substrate; and (b) executing a heat treatment on the semiconductor film while the plurality of protruding sections and the semiconductor film are in contact with each other.Type: ApplicationFiled: March 23, 2007Publication date: September 27, 2007Applicant: SEIKO EPSON CORPORATIONInventors: Sumio Utsunomiya, Hideto Ishiguro
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Publication number: 20070216280Abstract: An organic electroluminescent device includes a substrate that is conductive at least on a first surface; a first insulating film located on the first surface of the substrate and including a portion of a first opening, a portion of a second opening, and a portion of a third opening; a semiconductor film located on the first insulating film and receiving a current from the first surface of the substrate via the portion of a first opening; a second insulating film located on the semiconductor film and in contact with the substrate via the portion of a second opening; a capacitance electrode located on the second insulating film; a gate electrode located on the second insulating film and overlapping the semiconductor film; an intermediate insulating film located on the gate electrode and capacitance electrode; a pixel electrode located on the intermediate insulating film and receiving a current via the semiconductor film; a light-emitting layer located on the pixel electrode; a common electrode located on the lType: ApplicationFiled: March 12, 2007Publication date: September 20, 2007Applicant: SEIKO EPSON CORPORATIONInventors: Hiroyuki HARA, Sumio UTSUNOMIYA, Daisuke ABE, Masayoshi TODOROKIHARA, Kazuyuki MIYASHITA
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Patent number: 7262088Abstract: A technique is described in which a layer to be transferred is easily peeled and transferred to a transferred body that is pliable or flexible. Also, a method of fabricating a semiconductor device using these peeling and transfer techniques, and electronic equipment fabricated with the semiconductor device is described. A transfer method in which a layer to be transferred formed on a substrate is transferred to a transfer body that is pliable or flexible includes the first step of forming a layer to be transferred on a substrate; the second step of bonding the layer to be transferred formed on the substrate to a transfer body that is pliable or flexible fixed on a fixture; and the third step of peeling the layer to be transferred from the substrate and transferring the layer to be transferred to the transfer body.Type: GrantFiled: March 7, 2005Date of Patent: August 28, 2007Assignee: Seiko Epson CorporationInventors: Taimei Kodaira, Sumio Utsunomiya
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Patent number: 7253087Abstract: The invention provides a transfer technique by which the dimensional precision of a thin-film device is not deteriorated, even if the device is produced by transferring a fine structure or a thin-film circuit layer onto a substrate with an inferior shape-stability. The method includes: forming a fine structure or a thin-film circuit layer on a first substrate using a photolithographic patterning process; shifting the fine structure or the thin-film circuit layer from the first substrate onto a second substrate, or shifting the fine structure or the thin-film circuit layer from the first substrate onto the second substrate via a third substrate; and forming a thin-film pattern on the fine structure or the thin-film circuit layer shifted onto the second substrate by a non-photolithographic method.Type: GrantFiled: May 21, 2004Date of Patent: August 7, 2007Assignee: Seiko Epson CorporationInventor: Sumio Utsunomiya
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Publication number: 20070173031Abstract: A thin-film circuit device includes a substrate and a thin-film circuit layer, disposed on the substrate, having an element region and a low-strength region. The element region includes thin-film elements. The low-strength region extends between an end portion of the thin-film circuit layer and the element region and has a mechanical strength less than that of the surroundings of the low-strength region.Type: ApplicationFiled: January 23, 2007Publication date: July 26, 2007Applicant: Seiko Epson CorporationInventors: Taimei Kodaira, Sumio Utsunomiya
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Publication number: 20070111450Abstract: The present invention provides a semiconductor device fabrication method capable of reducing the thermal load on the substrate. The present invention also provides a semiconductor device fabrication method capable of improving the characteristics of a semiconductor element. The semiconductor device fabrication method according to the present invention comprises a step of thermally processing a semiconductor layer that is deposited on a substrate by using, as a heat source, the flame of a gas burner that uses a mixed gas of hydrogen and oxygen as fuel. As a result of thermal processing, the semiconductor layer is re-crystallized and an oxide film is formed on the surface of the semiconductor layer. The oxide film can be used as a gate insulation film and a capacitive insulation film.Type: ApplicationFiled: November 8, 2006Publication date: May 17, 2007Applicant: SEIKO EPSON CORPORATIONInventors: Mitsuru Sato, Sumio Utsunomiya
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Publication number: 20060223328Abstract: A method for manufacturing a semiconductor device, comprises providing a semiconductor layer deposited on a substrate with heat treatment by using a flame of a gas burner fueled by a hydrogen-and-oxygen mixed gas as a heat source.Type: ApplicationFiled: March 27, 2006Publication date: October 5, 2006Applicant: Seiko Epson CorporationInventors: Sumio Utsunomiya, Mitsuru Sato
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Patent number: 7105422Abstract: To provide a thin film circuit device in which a three-dimensional circuit structure is realized, a thin film circuit device is formed of a first thin film circuit layer and a second thin film circuit layer laminated to each other. The first thin film circuit layer contains a first thin film circuit provided between an underlayer and a protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer. The second thin film circuit layer contains a second thin film circuit provided between an underlayer and a protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer.Type: GrantFiled: November 15, 2005Date of Patent: September 12, 2006Assignee: Seiko Epson CorporationInventor: Sumio Utsunomiya
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Patent number: 7101729Abstract: The present invention aims to manufacture a large size semiconductor device with the inter-substrate transcription technology of thin film circuits. Enlargement is enabled by disposing a plurality of second substrates (21) in a tile shape. As the second substrate (21), a print substrate or flexible print circuit having double-sided wiring or multilayer wiring is employed. The plurality of second substrates (21) is driven independently, and the plurality of second substrates (21) is made to mutually overlap, and a drive circuit (23) is disposed at such overlapping portion. Moreover, the plurality of second substrates (21) is made to mutually overlap, and the mutual circuits are connected at such overlapping portion.Type: GrantFiled: March 20, 2003Date of Patent: September 5, 2006Assignee: Seiko Epson CorporationInventors: Mutsumi Kimura, Satoshi Inoue, Sumio Utsunomiya, Hiroyuki Hara, Wakao Miyazawa
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Patent number: 7029960Abstract: A device manufacturing method, including: a first process for providing the plural elements on the original substrate via a separation layer in a condition where terminal sections are exposed to a surface on an opposite side to the separation layer; a second process for adhering the surface where the terminal sections of the elements to be transferred on the original substrate are exposed, via conductive adhesive, to a surface of the final substrate on a side where conductive sections for conducting with the terminal sections of the elements are provided; a third process for producing exfoliation in the separation layer between the original substrate and the final substrate; and a fourth process for separating the original substrate from which the transfer of elements has been completed, from the final substrate.Type: GrantFiled: January 14, 2004Date of Patent: April 18, 2006Assignee: Seiko Epson CorporationInventors: Takashi Hashimoto, Atsushi Takakuwa, Tomoyuki Kamakura, Sumio Utsunomiya
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Publication number: 20060068533Abstract: To provide a thin film circuit device in which a three-dimensional circuit structure is realized, a thin film circuit device is formed of a first thin film circuit layer and a second thin film circuit layer laminated to each other. The first thin film circuit layer contains a first thin film circuit provided between an underlayer and a protective layer and a lower connection electrode connected to the first thin film circuit and exposed at a part of the bottom surface of the underlayer. The second thin film circuit layer contains a second thin film circuit provided between an underlayer and a protective layer, an upper connection electrode connected to the second thin film circuit and exposed at a part of the top surface of the protective layer, and a lower connection electrode connected to the second thin film circuit and exposed at a part of the bottom surface of the underlayer.Type: ApplicationFiled: November 15, 2005Publication date: March 30, 2006Applicant: SEIKO EPSON CORPORATIONInventor: Sumio Utsunomiya
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Publication number: 20050280037Abstract: In a semiconductor device made by forming functional elements on a first substrate, transferring the element chip onto a second substrate, and connecting first pads on the element chip to second pads on the second substrate, the area or the width of the first is increased. The first pads can be securely connected to the second pads even when misalignment occurs during the separating and transferring processes. Only the first pads are formed on a surface of the element chip at the second-substrate-side. The functional elements are formed to be farther from the second substrate than the first pads. Alternatively, only the first pads are formed on a surface of the element chip remote from the second substrate, and the functional elements are formed to be closer to the second substrate than the first pads. Alternatively, the first pads are formed on both the surface of the element chip at the second-substrate-side and the surface of the element chip remote from the second substrate.Type: ApplicationFiled: August 4, 2005Publication date: December 22, 2005Applicant: Seiko Epson CorporationInventors: Mutsumi Kimura, Sumio Utsunomiya, Hiroyuki Hara, Wakao Miyazawa
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Publication number: 20050280041Abstract: A device manufacturing method, including: a first process for providing the plural elements on the original substrate via a separation layer in a condition where terminal sections are exposed to a surface on an opposite side to the separation layer; a second process for adhering the surface where the terminal sections of the elements to be transferred on the original substrate are exposed, via conductive adhesive, to a surface of the final substrate on a side where conductive sections for conducting with the terminal sections of the elements are provided; a third process for producing exfoliation in the separation layer between the original substrate and the final substrate; and a fourth process for separating the original substrate from which the transfer of elements has been completed, from the final substrate.Type: ApplicationFiled: August 17, 2005Publication date: December 22, 2005Applicant: SEIKO EPSON CORPORATIONInventors: Takashi Hashimoto, Atsushi Takakuwa, Tomoyuki Kamakura, Sumio Utsunomiya