Patents by Inventor Sung-ki Lee

Sung-ki Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200075453
    Abstract: A semiconductor device includes a first case part, a second case part coupled to the first case part to provide a case, a semiconductor module disposed within the case closer to the second case part than to the first case part, and a plate interposed between the first case part and the semiconductor module. The plate is a thermal conductor, i.e., is of material having thermal conductivity, to transfer heat generated by the semiconductor module to the case where the heat can dissipate to the outside of the semiconductor device.
    Type: Application
    Filed: August 7, 2019
    Publication date: March 5, 2020
    Inventors: SUIN KIM, JIYONG KIM, SUNG-KI LEE
  • Publication number: 20200077547
    Abstract: A solid state drive apparatus includes a case including a base and side walls extending upward along a circumference of the base, an electrostatic prevention structure of a metal pillar spaced apart from the side walls and protruding from at least a partial surface of the base and an electrostatic absorbing member on at least a partial surface of the metal pillar, a package substrate module mounted on the electrostatic prevention structure in the case, and a cover covering the case and the package substrate module.
    Type: Application
    Filed: March 12, 2019
    Publication date: March 5, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-ki LEE, In-sub KWAK, Il-han YUN
  • Publication number: 20190354145
    Abstract: A memory device includes: a first casing; a second casing on the first casing; a memory module in an inner space between the first and second casings; and a plate between the first and second casings, wherein the plate includes an air hole and a wing, and wherein the wing includes: a first segment near an outside of the first and second casings; and a second segment near the inner space, wherein the first segment is located at a level different from a level of the second segment.
    Type: Application
    Filed: January 29, 2019
    Publication date: November 21, 2019
    Inventors: Jiyong KIM, Suin KIM, Teck Su OH, Sung-Ki LEE
  • Patent number: 9894805
    Abstract: A heat sink for a memory module includes a thermally conductive base plate configured to be mounted to a module board underneath the base plate, a plurality of radiation fins protruding upwardly from the base plate, and a pocket cover extending upwardly from an opening that is formed in the base plate to be positioned corresponding to a passive device on the module board, and covering the passive device that protrudes through the opening.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: February 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Yong Kim, Yu-Sung Kim, Chung-Hyun Ryu, Sung-Ki Lee
  • Publication number: 20170105314
    Abstract: A heat sink for a memory module includes a thermally conductive base plate configured to be mounted to a module board underneath the base plate, a plurality of radiation fins protruding upwardly from the base plate, and a pocket cover extending upwardly from an opening that is formed in the base plate to be positioned corresponding to a passive device on the module board, and covering the passive device that protrudes through the opening.
    Type: Application
    Filed: August 5, 2016
    Publication date: April 13, 2017
    Inventors: Ji-Yong Kim, Yu-Sung Kim, Chung-Hyun Ryu, Sung-Ki Lee
  • Patent number: 9504160
    Abstract: A semiconductor memory device is included. The semiconductor device includes a semiconductor memory device, comprising: a first substrate including a first semiconductor device mounted on the first substrate and a first connection terminal disposed at an edge of the first substrate; a second substrate including a second semiconductor device mounted on the second substrate and a second connection terminal at an edge of the second substrate; and an interface connector including a first socket portion configured to receive the first connection terminal and a second socket portion configured to receive the second connection terminal. The interface connector further includes: first socket terminals of the first socket portion are connected with the first connection terminals; second socket terminals of the second socket portion are connected with the second connection terminals; and an internal wiring for electrically connecting the first socket terminals with the second socket terminals.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: November 22, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Teck-su Oh, Sung-ki Lee
  • Publication number: 20160019967
    Abstract: An external memory device configured to communicate with an external electronic device includes: a semiconductor substrate including a first edge and a second edge perpendicular to the first edge; a semiconductor integrated circuit device provided on the semiconductor substrate, the semiconductor integrated circuit device including a memory device configured to store data provided from the external electronic device, an input/output interface configured to interface with the external electronic device, and a controller configured to control the memory device in response to a signal transmitted through the input/output interface; an insulating layer covering the semiconductor integrated circuit device; and external input/output pins provided adjacent to the first edge on the insulating layer and configured to establish an electrical connection between the external electronic device and the semiconductor integrated circuit device.
    Type: Application
    Filed: July 17, 2015
    Publication date: January 21, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myungryul JANG, Sung-ki LEE, Jongmin JANG
  • Publication number: 20150337569
    Abstract: A device for opening and closing a push open type fuel door for a vehicle may include a latch assembly, a push button assembly and a motor assembly modularized and mounted in a single housing. The latch assembly may come into direct contact with a fuel door so as to lock or unlock the fuel door. The push button assembly may be connected with the latch assembly so as to be operated in conjunction with the latch assembly, and unlock or lock the latch assembly while being moved upward or downward by pushing the fuel door. The motor assembly may lock a push button of the push button assembly so as to restrict movement of the push button and the latch assembly when the fuel door is closed.
    Type: Application
    Filed: December 15, 2014
    Publication date: November 26, 2015
    Applicants: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Sang Kyoon LIM, Na Eon KIM, Sung Ki LEE, Kyung Hoon PARK
  • Patent number: 9122468
    Abstract: A method of controlling a power save mode of an image forming apparatus connected to a host apparatus, the method includes: requesting information on a power mode of the image forming apparatus; transmitting the power mode information and information on an entering time for a power save mode of the image forming apparatus from the image forming apparatus; and displaying the entering time for the power save mode of the image forming apparatus on a basis of the entering time information.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: September 1, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sung-ki Lee
  • Publication number: 20150138735
    Abstract: A semiconductor memory device is included. The semiconductor device includes a semiconductor memory device, comprising: a first substrate including a first semiconductor device mounted on the first substrate and a first connection terminal disposed at an edge of the first substrate; a second substrate including a second semiconductor device mounted on the second substrate and a second connection terminal at an edge of the second substrate; and an interface connector including a first socket portion configured to receive the first connection terminal and a second socket portion configured to receive the second connection terminal. The interface connector further includes: first socket terminals of the first socket portion are connected with the first connection terminals; second socket terminals of the second socket portion are connected with the second connection terminals; and an internal wiring for electrically connecting the first socket terminals with the second socket terminals.
    Type: Application
    Filed: November 19, 2014
    Publication date: May 21, 2015
    Inventors: Teck-su OH, Sung-ki LEE
  • Publication number: 20140063607
    Abstract: A printed material includes a printed material body with a surface, and an optical element disposed on the surface of the printed material body. The optical element includes multiple structures formed at a pitch not longer than the wavelength of visible light. The structures have an aspect ratio of 0.6 or more and 5.0 or less.
    Type: Application
    Filed: March 30, 2012
    Publication date: March 6, 2014
    Applicant: SONY CORPORATION
    Inventors: Tomoo Fukuda, Mitsuo Arima, Sung-Ki Lee, Yu Nomura, Hiroyuki Kiso, Fumihiko Iida
  • Publication number: 20130305072
    Abstract: A method of controlling a power save mode of an image forming apparatus connected to a host apparatus, the method includes: requesting information on a power mode of the image forming apparatus; transmitting the power mode information and information on an entering time for a power save mode of the image forming apparatus from the image forming apparatus; and displaying the entering time for the power save mode of the image forming apparatus on a basis of the entering time information.
    Type: Application
    Filed: July 15, 2013
    Publication date: November 14, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Sung-ki LEE
  • Patent number: 8516286
    Abstract: A method of controlling a power save mode of an image forming apparatus connected to a host apparatus, the method includes: requesting information on a power mode of the image forming apparatus; transmitting the power mode information and information on an entering time for a power save mode of the image forming apparatus from the image forming apparatus; and displaying the entering time for the power save mode of the image forming apparatus on a basis of the entering time information.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: August 20, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-ki Lee
  • Publication number: 20100160151
    Abstract: A method is developed for fabrication of an ammonia gas adsorbent using Fe-zeolite. This method uses Fe-zeolite obtained from municipal waste slag to prepare a gas adsorbent, thereby reusing molten slag as a specified waste so as to improve the value of the waste. To achieve the purpose, the method includes mixing Fe-zeolite powder with a forming adjuvant to prepare a mixture; adding a forming agent to the mixture to obtain a granular Fe-zeolite product; and drying and calcining the obtained granular Fe-zeolite product. Therefore, Fe-zeolite obtained from molten slag as a waste product can be reused as an ammonia gas adsorbent.
    Type: Application
    Filed: July 30, 2009
    Publication date: June 24, 2010
    Inventors: In Kook Bae, Young Nam Jang, Soo Chun Chae, Sung Ki Lee, Kyeoung Won Ryu
  • Publication number: 20090150698
    Abstract: A method of controlling a power save mode of an image forming apparatus connected to a host apparatus, the method includes: requesting information on a power mode of the image forming apparatus; transmitting the power mode information and information on an entering time for a power save mode of the image forming apparatus from the image forming apparatus; and displaying the entering time for the power save mode of the image forming apparatus on a basis of the entering time information.
    Type: Application
    Filed: October 16, 2008
    Publication date: June 11, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Sung-ki LEE
  • Publication number: 20090057916
    Abstract: A semiconductor package is provided. The semiconductor package comprises a substrate having a top surface and a bottom surface, a first semiconductor chip having a plurality of bonding pad regions electrically connected to the substrate by a plurality of first bonding wires, a spacer tape covering the active surface of the first semiconductor chip excluding the plurality of bonding pad regions, and a second semiconductor chip mounted on the active surface of the first semiconductor chip with the spacer interposed.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kun-Dae YEOM, Sang-Wook PARK, Sung-Ki LEE
  • Publication number: 20090026596
    Abstract: In certain embodiments, a lead frame includes a paddle, a plurality of inner leads, first outer leads, and a second outer lead. The plurality of inner leads can be arranged at a side face of the paddle. The first outer leads can extend from the inner leads along a first direction and can be arranged at a substantially central portion of the side face of the paddle. Furthermore, each of the first outer leads can have a first area. The second outer lead can be arranged at an edge portion of the side face of the paddle and can be supported by the paddle. The second outer lead can have a second area that is larger than the first area.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wook PARK, Jong-Gi LEE, Kun-Dae YEOM, Sung-Ki LEE, Ji-Seok HONG
  • Publication number: 20080308913
    Abstract: A stacked semiconductor package includes a first semiconductor package, a second semiconductor package and a conductive connection member. The first semiconductor package includes a first semiconductor chip, a first lead frame having first outer leads that are electrically connected to the first semiconductor chip, and a first molding member formed on the first semiconductor chip and the first lead frame to expose the first outer leads. The second semiconductor package includes a second semiconductor chip, a second lead frame formed on the first molding member and having second outer leads that may be electrically connected to the second semiconductor chip, and a second molding member formed on the second semiconductor chip and the second lead frame to expose the second outer leads. The conductive connection member may electrically connect the first outer leads and the second outer leads to each other. Further, the conductive connection member may have a crack-blocking groove.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 18, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wook PARK, Min-Young SON, Jong-Gi LEE, Kun-Dae YEOM, Sung-Ki LEE, Ji-Seok HONG
  • Publication number: 20080073761
    Abstract: A semiconductor package including at least one semiconductor chip and inner leads may be provided. The semiconductor package may include a semiconductor chip. A plurality of inner leads having upper surfaces and lower surfaces, may be electrically connected to the semiconductor chip, and may be spaced apart from the semiconductor chip. A molding resin may fix the semiconductor chip and the inner leads. The upper surfaces of the inner leads may be fixed to the molding resin, the lower surfaces of the inner leads may be exposed from the molding resin, and widths of the lower surfaces of the inner leads may be narrower than widths of the upper surfaces of the inner leads.
    Type: Application
    Filed: October 31, 2006
    Publication date: March 27, 2008
    Inventors: Chan-min Han, Beung-seuck Song, Sung-ki Lee
  • Publication number: 20060151878
    Abstract: Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus may include a plating unit to perform a conductive plating process to form a conductive plating layer on external terminals of a semiconductor chip package, and a reflow unit adapted to melt the conductive plating layer. The plating unit and reflow unit may be disposed in a single line with the plating module. Thus, it is possible to effectively suppress the growth of whiskers on the plating layer of the external terminals, and to secure economical efficiency, reducing costs, and allowing mass production.
    Type: Application
    Filed: January 6, 2006
    Publication date: July 13, 2006
    Inventors: Se-Young Jeong, Nam-Seog Kim, Sung-Ki Lee, Hee-Kook Choi, Ki-Kwon Jeong, Tae-Sung Park, Yoshikuni Nakadaira, Sang-Hyeop Lee, Sung-Hwan Kim