Abstract: The invention provides a method for forming a microelectronic device comprising: forming a first electrode; depositing an adhesion layer over the first electrode utilizing high density plasma physical vapor deposition, wherein the adhesion layer comprises a material selected from Ta, TaNx, W, WNx, Ta/TaNx, W/WNx, and combinations thereof, depositing a dielectric layer over the adhesion layer; and forming a second electrode over the dielectric layer. The invention also provides a microelectronic device comprising: a first electrode; a second electrode; a dielectric layer disposed between the first and second electrodes; and an adhesion layer disposed between the first electrode and the dielectric layer, wherein the adhesion layer comprises a material selected from Ta, TaNx, W, WNx, Ta/TaNx, W/WNx, and combinations thereof.

Abstract: The present invention provides an effective barrier layer for improved via fill in high aspect ratio sub-micron apertures at low temperature, particularly at the contact level on a substrate. In one aspect of the invention, a feature is filled by first depositing a barrier layer onto a substrate having high aspect ratio contacts or vias formed thereon. The barrier layer is preferably comprised of Ta, TaNx, W, WNx, or combinations thereof. A CVD conformal metal layer is then deposited over the barrier layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal layer is deposited onto the previously formed CVD conformal metal layer at a temperature below that of the melting point temperature of the metal to allow flow of the CVD conformal layer and the PVD metal layer into the vias.

Abstract: The present invention provides an effective barrier layer for improved via fill in high aspect ratio sub-micron apertures at low temperature, particularly at the contact level on a substrate. In one aspect of the invention, a feature is filled by first depositing a barrier layer onto a substrate having high aspect ratio contacts or vias formed thereon. The barrier layer is preferably comprised of Ta, TaNx, W, WNx, or combinations thereof. A CVD conformal metal layer is then deposited over the barrier layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal layer is deposited onto the previously formed CVD conformal metal layer at a temperature below that of the melting point temperature of the metal to allow flow of the CVD conformal layer and the PVD metal layer into the vias.