Patents by Inventor Susanne M. Balle

Susanne M. Balle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11290392
    Abstract: Technologies for pooling accelerators over fabric are disclosed. In the illustrative embodiment, an application may access an accelerator device over an application programming interface (API) and the API can access an accelerator device that is either local or a remote accelerator device that is located on a remote accelerator sled over a network fabric. The API may employ a send queue and a receive queue to send and receive command capsules to and from the accelerator sled.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: March 29, 2022
    Assignee: Intel Corporation
    Inventors: Sujoy Sen, Mohan J. Kumar, Donald L. Faw, Susanne M. Balle, Narayan Ranganathan
  • Patent number: 11269395
    Abstract: Technologies for providing adaptive power management in an accelerator sled include an accelerator sled having circuitry to determine, based on (i) a total power budget for the accelerator sled, (ii) service level agreement (SLA) data indicative of a target performance of a kernel, and (iii) profile data indicative of a performance of the kernel as a function of a power utilization of the kernel, a power utilization limit for the kernel to be executed by an accelerator device on the accelerator sled. Additionally, the circuitry is to allocate the determined power utilization limit to the kernel and execute the kernel under the allocated power utilization limit.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Susanne M. Balle, Sujoy Sen, Evan Custodio, Paul H. Dormitzer
  • Publication number: 20220027476
    Abstract: Disclosed herein are embodiments related to security in cloudlet environments. In some embodiments, for example, a computing device (e.g., a cloudlet) may include: a trusted execution environment; a Basic Input/Output System (BIOS) to request a Key Encryption Key (KEK) from the trusted execution environment; and a Self-Encrypting Storage (SES) associated with the KEK; wherein the trusted execution environment is to verify the BIOS and provide the KEK to the BIOS subsequent to verification of the BIOS, and the BIOS is to provide the KEK to the SES to unlock the SES for access by the trusted execution environment.
    Type: Application
    Filed: October 7, 2021
    Publication date: January 27, 2022
    Applicant: Intel Corporation
    Inventors: Yeluri Raghuram, Susanne M. Balle, Nigel Thomas Cook, Kapil Sood
  • Publication number: 20220019461
    Abstract: A platform health engine for autonomous self-healing in platforms served by an Infrastructure Processing Unit (IPU), including: an analysis processor configured to apply analytics to telemetry data received from a telemetry agent of a monitored platform managed by the IPU, and to generate relevant platform health data; a prediction processor configured to predict, based on the relevant platform health data, a future health status of the monitored platform; and a dispatch processor configured to dispatch a workload of the monitored platform to another platform managed if the predicted future health status of the monitored platform is failure.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 20, 2022
    Inventors: Susanne M. Balle, Yamini Nimmagadda, Olugbemisola Oniyinde
  • Patent number: 11228539
    Abstract: Technologies for network interface controllers (NICs) include a compute sled and an accelerator sled in communication over a network. The accelerator sled configures a virtual switch endpoint associated with a remote direct memory access (RDMA) server instance that is associated with a field-programmable gate array (FPGA) of the accelerator sled. The accelerator sled updates local software defined networking (SDN) tables with a virtual tunnel associated with the virtual switch endpoint and a remote compute sled. A virtual switch of the accelerator sled switches virtual tunnel traffic from the remote compute sled to the RDMA server instance, which transfers data to or from the FPGA. The compute sled also updates a local SDN table with the virtual tunnel, and a virtual switch of the compute sled switches virtual tunnel traffic to or from the accelerator sled. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: January 18, 2022
    Assignee: Intel Corporation
    Inventors: Mrittika Ganguli, Sugesh Chandran, Parthasarathy Sarangam, Sujoy Sen, Susanne M. Balle, Rajesh Sankaran
  • Publication number: 20210365199
    Abstract: A compute device to manage workflow to disaggregated computing resources is provided. The compute device comprises a compute engine receive a workload processing request, the workload processing request defined by at least one request parameter, determine at least one accelerator device capable of processing a workload in accordance with the at least one request parameter, transmit a workload to the at least one accelerator device, receive a work product produced by the at least one accelerator device from the workload, and provide the work product to an application.
    Type: Application
    Filed: April 2, 2021
    Publication date: November 25, 2021
    Inventors: Francesc Guim Bernat, Evan CUSTODIO, Susanne M. Balle, Joe Grecco, Henry Mitchel, Slawomir Putyrski
  • Publication number: 20210334138
    Abstract: Technologies for pre-configuring accelerators by predicting bit-streams include communication circuitry and a compute device. The compute device includes a compute engine to determine one or more bit-streams registered on each accelerator of multiple accelerators. The compute engine is further to predict a next job to be requested for acceleration from an application of at least one compute sled of multiple compute sleds, predict a bit-stream from a bit-stream library that is to execute the predicted next job requested to be accelerated, and determine whether the predicted bit-stream is already registered on one of the accelerators. In response to a determination that the predicted bit-stream is not registered on one of the accelerators, the compute engine is to select an accelerator from the plurality of accelerators that satisfies characteristics of the predicted bit-stream and register the predicted bit-stream on the determined accelerator.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 28, 2021
    Inventors: Francesc GUIM BERNAT, Susanne M. BALLE, Slawomir PUTYRSKI, Rahul KHANNA, Paul DORMITZER
  • Publication number: 20210318823
    Abstract: Technologies for offloading acceleration task scheduling operations to accelerator sleds include a compute device to receive a request from a compute sled to accelerate the execution of a job, which includes a set of tasks. The compute device is also to analyze the request to generate metadata indicative of the tasks within the job, a type of acceleration associated with each task, and a data dependency between the tasks. Additionally the compute device is to send an availability request, including the metadata, to one or more micro-orchestrators of one or more accelerator sleds communicatively coupled to the compute device. The compute device is further to receive availability data from the one or more micro-orchestrators, indicative of which of the tasks the micro-orchestrator has accepted for acceleration on the associated accelerator sled. Additionally, the compute device is to assign the tasks to the one or more micro-orchestrators as a function of the availability data.
    Type: Application
    Filed: March 26, 2021
    Publication date: October 14, 2021
    Inventors: Susanne M. Balle, Francesc Guim Bernat, Slawomir Putyrski, Joe Grecco, Henry MITCHEL, Rahul Khanna, Evan CUSTODIO
  • Publication number: 20210314245
    Abstract: Technologies for dynamically managing resources in disaggregated accelerators include an accelerator. The accelerator includes acceleration circuitry with multiple logic portions, each capable of executing a different workload. Additionally, the accelerator includes communication circuitry to receive a workload to be executed by a logic portion of the accelerator and a dynamic resource allocation logic unit to identify a resource utilization threshold associated with one or more shared resources of the accelerator to be used by a logic portion in the execution of the workload, limit, as a function of the resource utilization threshold, the utilization of the one or more shared resources by the logic portion as the logic portion executes the workload, and subsequently adjust the resource utilization threshold as the workload is executed. Other embodiments are also described and claimed.
    Type: Application
    Filed: April 20, 2021
    Publication date: October 7, 2021
    Inventors: Francesc GUIM BERNAT, Susanne M. BALLE, Rahul KHANNA, Sujoy SEN, Karthik KUMAR
  • Publication number: 20210314168
    Abstract: Technologies for providing certified telemetry data indicative of resource utilizations include a device with circuitry configured to obtain telemetry data indicative of a utilization of one or more device resources over a time period. The circuitry is additionally configured to validate the obtained telemetry data with a private key associated with the present device.
    Type: Application
    Filed: June 21, 2021
    Publication date: October 7, 2021
    Inventors: Francesc Guim Bernat, Johan Van De Groenendaal, Kshitij A. Doshi, Susanne M. Balle, Suraj Prabhakaran
  • Patent number: 11137922
    Abstract: Technologies for providing accelerated functions as a service in a disaggregated architecture include a compute device that is to receive a request for an accelerated task. The task is associated with a kernel usable by an accelerator sled communicatively coupled to the compute device to execute the task. The compute device is further to determine, in response to the request and with a database indicative of kernels and associated accelerator sleds, an accelerator sled that includes an accelerator device configured with the kernel associated with the request. Additionally, the compute device is to assign the task to the determined accelerator sled for execution. Other embodiments are also described and claimed.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: October 5, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Evan Custodio, Susanne M. Balle, Joe Grecco, Henry Mitchel, Rahul Khanna, Slawomir Putyrski, Sujoy Sen, Paul Dormitzer
  • Patent number: 11128555
    Abstract: Techniques for migration for composite nodes in software-defined infrastructures (SDI) are described. A SDI system may include a SDI manager component, including one or more processor circuits, configured to access one or more remote resources, the SDI manager component may include a partition manager configured to receive a request to create a composite node from an orchestrator component, the request including at least one preferred compute sled type and at least one alternative compute sled type. The SDI manager may create a composite node using a first compute sled matching the at least one alternative compute sled type. The SDI manager may determine, based upon a migration table stored on a non-transitory computer-readable storage medium that a second compute sled matching the at least one preferred compute sled type is available. The SDI manager may perform an migration from the first compute sled to the second compute sled. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: September 21, 2021
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Susanne M. Balle, Daniel Rivas Barragan, John Chun Kwok Leung, Mark S. Myers, Suraj Prabhakaran, Murugasamy K. Nachimuthu, Slawomir Putyrski
  • Patent number: 11119835
    Abstract: Technologies for providing efficient reprovisioning in an accelerator device include an accelerator sled. The accelerator sled includes a memory and an accelerator device coupled to the memory. The accelerator device is to configure itself with a first bit stream to establish a first kernel, execute the first kernel to produce output data, write the output data to the memory, configure itself with a second bit stream to establish a second kernel, and execute the second kernel with the output data in the memory used as input data to the second kernel. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: September 14, 2021
    Assignee: Intel Corporation
    Inventors: Evan Custodio, Susanne M. Balle, Francesc Guim Bernat, Slawomir Putyrski, Joe Grecco, Henry Mitchel
  • Patent number: 11115497
    Abstract: Technologies for providing advanced resource management in a disaggregated environment include a compute device. The compute device includes circuitry to obtain a workload to be executed by a set of resources in a disaggregated system, query a sled in the disaggregated system to identify an estimated time to complete execution of a portion of the workload to be accelerated using a kernel, and assign, in response to a determination that the estimated time to complete execution of the portion of the workload satisfies a target quality of service associated with the workload, the portion of the workload to the sled for acceleration.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Slawomir Putyrski, Susanne M. Balle, Thomas Willhalm, Karthik Kumar
  • Publication number: 20210271403
    Abstract: Technologies for dividing work across one or more accelerator devices include a compute device. The compute device is to determine a configuration of each of multiple accelerator devices of the compute device, receive a job to be accelerated from a requester device remote from the compute device, and divide the job into multiple tasks for a parallelization of the multiple tasks among the one or more accelerator devices, as a function of a job analysis of the job and the configuration of each accelerator device. The compute engine is further to schedule the tasks to the one or more accelerator devices based on the job analysis and execute the tasks on the one or more accelerator devices for the parallelization of the multiple tasks to obtain an output of the job.
    Type: Application
    Filed: May 14, 2021
    Publication date: September 2, 2021
    Inventors: Susanne M. Balle, Francesc Guim Bernat, Slawomir Putyrski, Joe Grecco, Henry Mitchel, Evan CUSTODIO, Rahul Khanna, Sujoy Sen
  • Patent number: 11095755
    Abstract: A host fabric interface (HFI), including: first logic to communicatively couple a host to a fabric; and second logic to provide a disaggregated telemetry engine (DTE) to: receive notification via the fabric of available telemetry data for a remote accelerator; allocate memory for handling the telemetry data; and receive the telemetry data from the disaggregated accelerator.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: August 17, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Susanne M. Balle, Rahul Khanna, Karthik Kumar
  • Patent number: 11055149
    Abstract: Technologies for providing workload-based sled position adjustment include a sled manipulator. The sled manipulator includes a compute engine configured to determine, as a function of a heat production of one or more resources located on a sled in the execution of a workload assigned to the sled, sled placement parameters indicative of a target position of the sled relative to a set of fans. The sled manipulator also includes a position adjustment subsystem configured to adjust, as a function of the sled placement parameters, a present position of the sled.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Susanne M. Balle, Douglas Dallmann
  • Patent number: 11044099
    Abstract: Technologies for providing certified telemetry data indicative of resource utilizations include a device with circuitry configured to obtain telemetry data indicative of a utilization of one or more device resources over a time period. The circuitry is additionally configured to sign the obtained telemetry data with a private key associated with the present device. Further, the circuitry is configured to send the signed telemetry data to a telemetry service for analysis.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 22, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Johan Van De Groenendaal, Kshitij A. Doshi, Susanne M. Balle, Suraj Prabhakaran
  • Patent number: 11029870
    Abstract: Technologies for dividing work across one or more accelerator devices include a compute device. The compute device is to determine a configuration of each of multiple accelerator devices of the compute device, receive a job to be accelerated from a requester device remote from the compute device, and divide the job into multiple tasks for a parallelization of the multiple tasks among the one or more accelerator devices, as a function of a job analysis of the job and the configuration of each accelerator device. The compute engine is further to schedule the tasks to the one or more accelerator devices based on the job analysis and execute the tasks on the one or more accelerator devices for the parallelization of the multiple tasks to obtain an output of the job.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Susanne M. Balle, Francesc Guim Bernat, Slawomir Putyrski, Joe Grecco, Henry Mitchel, Evan Custodio, Rahul Khanna, Sujoy Sen
  • Publication number: 20210141731
    Abstract: Examples described herein relate to prefetching content from a remote memory device to a memory tier local to a higher level cache or memory. An application or device can indicate a time availability for data to be available in a higher level cache or memory. A prefetcher used by a network interface can allocate resources in any intermediary network device in a data path from the remote memory device to the memory tier local to the higher level cache. Memory access bandwidth, egress bandwidth, memory space in any intermediary network device can be allocated for prefetch of content. In some examples, proactive prefetch can occur for content expected to be prefetched but not requested to be prefetched.
    Type: Application
    Filed: December 17, 2020
    Publication date: May 13, 2021
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Slawomir Putyrski, Susanne M. Balle