Abstract: A SEB resistance evaluation method includes: disposing an excitation source within a model of a semiconductor device; and determining an energy of the excitation source at which the semiconductor device exhibits thermal runaway, while varying a voltage applied to the model of the semiconductor device and the energy of the excitation source.

Abstract: A SEB resistance evaluation method includes: disposing an excitation source within a model of a semiconductor device; and determining an energy of the excitation source at which the semiconductor device exhibits thermal runaway, while varying a voltage applied to the model of the semiconductor device and the energy of the excitation source.

Abstract: The object is to provide a technique for adjusting a turn-on operation and a turn-off operation of a transistor independently from each other in simulation for evaluating characteristics of the transistor. A simulation circuit for simulation for evaluating characteristics of a transistor includes a gate power supply configured to apply a voltage to a gate terminal of the transistor, a first diode connected between the gate terminal and the gate power supply, and a second diode connected in antiparallel with the first diode.

Abstract: The object is to provide a technique for adjusting a turn-on operation and a turn-off operation of a transistor independently from each other in simulation for evaluating characteristics of the transistor. A simulation circuit for simulation for evaluating characteristics of a transistor includes a gate power supply configured to apply a voltage to a gate terminal of the transistor, a first diode connected between the gate terminal and the gate power supply, and a second diode connected in antiparallel with the first diode.

Abstract: Provided is a heat treatment device including: a laser oscillator configured to produce a laser; one or more optical systems each configured to irradiate an object to be treated with the laser produced from the laser oscillator; and a rotating table on which the object is to be mounted. When a reaching temperature of the object, at which an activation rate of the object reaches a target value through one-time irradiation with the laser, is set as a first temperature, a second temperature lower than the first temperature is set as a target value of the reaching temperature of the object, and the object is repeatedly irradiated with the laser from one of the one or more optical systems two or more times.

Abstract: A laser annealing device of the present invention includes a stage on which a heating object is placed, a first laser element which emits first continuous laser light, a first optical system which leads the first continuous laser light to the heating object to form a first application region on the heating object, a second laser element which emits second continuous laser light having a wavelength shorter than that of the first continuous laser light, a second optical system which leads the second continuous laser light to the heating object to form a second application region on the heating object, and a system controller which executes scanning with the first application region and the second application region so that each portion of the heating object is scanned with at least part of the first application region before being scanned with the second application region.

Abstract: According to the present invention, since the buffer layer is formed by multiple ion implantations of different acceleration energies and the non-diffusion region in which impurity do not diffuse is left between the buffer layer and the collector layer, the semiconductor device which can supply sufficient holes to the drift layer at the turn-off can be manufactured while the withstand voltage is ensured.

Abstract: According to the present invention, since the buffer layer is formed by multiple ion implantations of different acceleration energies and the non-diffusion region in which impurity do not diffuse is left between the buffer layer and the collector layer, the semiconductor device which can supply sufficient holes to the drift layer at the turn-off can be manufactured while the withstand voltage is ensured.

Abstract: An object of the present invention is to provide a trench gate type IGBT achieving both retention of withstand voltage and lowering of ON-state voltage and to provide a method for manufacturing the trench gate type IGBT. The IGBT according to the present invention is an SJ-RC-IGBT which includes a drift layer having super junction structure, and includes an IGBT area and an FWD area on the rear surface. In the IGBT according to the present invention, a first drift layer has an impurity concentration of 1×1015 atms/cm3 or higher and lower than 2×1016 atms/cm3, and a thickness of 10 ?m or larger and smaller than 50 ?m; and that a buffer layer has an impurity concentration of 1×1015 atms/cm3 or higher and lower than 2×1016 atms/cm3, and a thickness of 2 ?m or larger and smaller than 15 ?m.

Abstract: A laser annealing device of the present invention includes a stage on which a heating object is placed, a first laser element which emits first continuous laser light, a first optical system which leads the first continuous laser light to the heating object to form a first application region on the heating object, a second laser element which emits second continuous laser light having a wavelength shorter than that of the first continuous laser light, a second optical system which leads the second continuous laser light to the heating object to form a second application region on the heating object, and a system controller which executes scanning with the first application region and the second application region so that each portion of the heating object is scanned with at least part of the first application region before being scanned with the second application region.

Abstract: An object of the present invention is to provide a trench gate type IGBT achieving both retention of withstand voltage and lowering of ON-state voltage and to provide a method for manufacturing the trench gate type IGBT. The IGBT according to the present invention is an SJ-RC-IGBT which includes a drift layer having super junction structure, and includes an IGBT area and an FWD area on the rear surface. In the IGBT according to the present invention, a first drift layer has an impurity concentration of 1×1015 atms/cm3 or higher and lower than 2×1016 atms/cm3, and a thickness of 10 ?m or larger and smaller than 50 ?m; and that a buffer layer has an impurity concentration of 1×1015 atms/cm3 or higher and lower than 2×1016 atms/cm3, and a thickness of 2 ?m or larger and smaller than 15 ?m.

Abstract: A trench gate IGBT designed to reduce on-state voltage while maintaining the withstand voltage, including a first drift layer formed on a first main surface of a buffer layer, a second drift layer of the first conductivity type formed on said first drift layer, a base layer of a second conductivity type formed on the second drift layer, an emitter layer of the first conductivity type selectively formed in the surface of the base layer, and a gate electrode buried from the surface of the emitter layer through into the second drift layer with a gate insulating film therebetween, wherein said first drift layer has a structure in which a first layer of the first conductivity type and a second layer of the second conductivity type are repeated in a horizontal direction.

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a P-type region on a surface of a semiconductor substrate, forming at least one Al electrode on the P-type region, forming an interlayer film in contact with the at least one Al electrode, the interlayer film being of a material which is less reactive with Si than is Al, and forming a semi-insulating film on the interlayer film, the semi-insulating film containing Si.

Abstract: A device and a device manufacturing process. First, a gettering layer is formed on the bottom surface of a silicon substrate. Gates having a MOS structure are then formed on the principal surface of the silicon substrate, and the gettering layer is removed. According to this manufacturing method, the formation of the gates having a MOS structure is performed such that the gettering layer getters dissolved oxygen present in the silicon substrate. This reduces the concentration of dissolved oxygen in the silicon substrate, resulting in improved device characteristics.

Abstract: A trench gate IGBT designed to reduce on-state voltage while maintaining the withstand voltage, including a first drift layer formed on a first main surface of a buffer layer, a second drift layer of the first conductivity type formed on said first drift layer, a base layer of a second conductivity type formed on the second drift layer, an emitter layer of the first conductivity type selectively formed in the surface of the base layer, and a gate electrode buried from the surface of the emitter layer through into the second drift layer with a gate insulating film therebetween, wherein said first drift layer has a structure in which a first layer of the first conductivity type and a second layer of the second conductivity type are repeated in a horizontal direction.

Abstract: A semiconductor substrate has a trench in a first main surface. An insulated gate field effect part includes a gate electrode formed in the first main surface. A potential fixing electrode fills the trench and has an expanding part expanding on the first main surface so that a width thereof is larger than the width of the trench. An emitter electrode is formed on the first main surface and insulated from the gate electrode electrically and connected to a whole upper surface of the expanding part of the potential fixing electrode. Thus, a semiconductor device capable of enhancing reliability in order to prevent an aluminum spike from generating and a manufacturing method thereof can be provided.

Abstract: In a MOSFET using SiC a p-type channel is formed by epitaxial growth, so that the depletion layer produced in the p-type region right under the channel is reduced, even when the device is formed in a self-aligned manner. Thus, a high breakdown voltage is obtained. Also, since the device is formed in a self-aligned manner, the device size can be reduced so that an increased number of devices can be fabricated in a certain area and the on-state resistance can be reduced.

Abstract: A semiconductor substrate has a trench in a first main surface. An insulated gate field effect part includes a gate electrode formed in the first main surface. A potential fixing electrode fills the trench and has an expanding part expanding on the first main surface so that a width thereof is larger than the width of the trench. An emitter electrode is formed on the first main surface and insulated from the gate electrode electrically and connected to a whole upper surface of the expanding part of the potential fixing electrode. Thus, a semiconductor device capable of enhancing reliability in order to prevent an aluminum spike from generating and a manufacturing method thereof can be provided.

Abstract: A semiconductor substrate has a trench in a first main surface. An insulated gate field effect part includes a gate electrode formed in the first main surface. A potential fixing electrode fills the trench and has an expanding part expanding on the first main surface so that a width thereof is larger than the width of the trench. An emitter electrode is formed on the first main surface and insulated from the gate electrode electrically and connected to a whole upper surface of the expanding part of the potential fixing electrode. Thus, a semiconductor device capable of enhancing reliability in order to prevent an aluminum spike from generating and a manufacturing method thereof can be provided.

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a P-type region on a surface of a semiconductor substrate, forming at least one Al electrode on the P-type region, forming an interlayer film in contact with the at least one Al electrode, the interlayer film being of a material which is less reactive with Si than is Al, and forming a semi-insulating film on the interlayer film, the semi-insulating film containing Si.