Patents by Inventor Tae-Won Ha

Tae-Won Ha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121948
    Abstract: A semiconductor device and a method of fabricating the same are provided. According to the present invention, a semiconductor device comprises an active region formed in a substrate, and including flat surfaces and hole-shaped recess portions; upper-level plugs disposed over the flat surfaces; a spacer disposed between the upper-level plugs and providing a trench exposing the hole-shaped recess portions; a lower-level plug filling the hole-shaped recess portions; and a buried conductive line disposed over the lower-level plug and partially filling the trench.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Jae Man YOON, Jin Hwan JEON, Tae Kyun KIM, Jung Woo PARK, Su Ock CHUNG, Jae Won HA
  • Publication number: 20240090121
    Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Jung BYUN, Jung Soo KIM, Sang Hyun SIM, Chang Min HA, Tae Hong MIN, Jin Won LEE
  • Publication number: 20240079456
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench in an insulating interlayer by etching the insulating interlayer; forming a conductive layer on bottom, side, and upper surfaces of the insulating interlayer where the trench is formed, using a first deposition process, the conductive layer on the bottom surface of the trench being thicker than the conductive layer on the side surface of the trench; forming a sacrificial layer in the trench covering the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process; selectively removing the conductive layer formed on the upper surface of the insulating interlayer and formed on the side surface of the trench left exposed through the sacrificial layer; and selectively removing the sacrificial layer, to form a conductive line using the conductive layer remaining on the bottom surface of the trench.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: SK hynix Inc.
    Inventors: Jae Man YOON, Jun Ki KIM, Tae Kyun KIM, Jung Woo PARK, Jae Won HA
  • Patent number: 11581435
    Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: February 14, 2023
    Inventors: Ju-Youn Kim, Hyung-Soon Jang, Jong-Mil Youn, Tae-Won Ha
  • Publication number: 20200303547
    Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Inventors: Ju-Youn Kim, Hyung-Soon Jang, Jong-Mil Youn, Tae-Won Ha
  • Patent number: 10778134
    Abstract: An apparatus for controlling an inverter for driving a motor includes a processor which includes: a current processor for generating a voltage command for causing a current detection value obtained by measuring a current supplied from the inverter to the motor to follow a current command for driving the motor; a voltage modulator for generating a pulse width modulation signal for controlling on and off states of switching elements in the inverter with a predetermined switching frequency based on the voltage command; and a frequency determining processor for setting a frequency change range within which the switching frequency will be randomly changed and randomly determining the switching frequency within the frequency change range when a random pulse width modulation method is applied to control of the inverter.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: September 15, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Sung Kyu Kim, Yong Jae Lee, Su Hyun Bae, Ho Joon Shin, Tae Won Ha, Joo Young Park
  • Patent number: 10714614
    Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: July 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Youn Kim, Hyung-Soon Jang, Jong-Mil Youn, Tae-Won Ha
  • Patent number: 10692781
    Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: June 23, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ju Youn Kim, Ji Hwan An, Tae Won Ha, Se Ki Hong
  • Patent number: 10630217
    Abstract: An apparatus for controlling an inverter for driving a motor including a processor which includes: a current processor configured to generate a voltage command for allowing a current detection value, generated by measuring a current provided from an inverter to a motor, to follow a current command for driving the motor; a voltage modulator configured to generate a pulse width modulation signal for controlling on and off states of a switching element within the inverter with a predetermined switching frequency based on the voltage command; and a frequency determining processor configured to randomly change the switching frequency based on driving information of the motor.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: April 21, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Yong Jae Lee, Tae Won Ha, Su Hyun Bae, Ho Joon Shin, Sung Kyu Kim, Joo Young Park
  • Patent number: 10580891
    Abstract: A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: March 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Soo Kim, Gi-Gwan Park, Sang-Koo Kang, Koung-Min Ryu, Jae-Hoon Lee, Tae-Won Ha
  • Patent number: 10553693
    Abstract: A semiconductor device includes a substrate having first and second active regions with a field insulating layer therebetween that contacts the first and second active regions, and a gate electrode on the substrate and traversing the first active region, the second active region, and the field insulating layer. The gate electrode includes a first portion over the first active region, a second portion over the second active region, and a third portion in contact with the first and second portions. The gate electrode includes an upper gate electrode having first through third thicknesses in the first through third portions, respectively, where the third thickness is greater than the first thickness, and smaller than the second thickness.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Se Ki Hong, Ju Youn Kim, Jin-Wook Kim, Tae Eung Yoon, Tae Won Ha, Jung Hoon Seo, Seul Gi Yun
  • Publication number: 20200028462
    Abstract: An apparatus for controlling an inverter for driving a motor includes a processor which includes: a current processor for generating a voltage command for causing a current detection value obtained by measuring a current supplied from the inverter to the motor to follow a current command for driving the motor; a voltage modulator for generating a pulse width modulation signal for controlling on and off states of switching elements in the inverter with a predetermined switching frequency based on the voltage command; and a frequency determining processor for setting a frequency change range within which the switching frequency will be randomly changed and randomly determining the switching frequency within the frequency change range when a random pulse width modulation method is applied to control of the inverter.
    Type: Application
    Filed: December 4, 2018
    Publication date: January 23, 2020
    Inventors: Sung Kyu Kim, Yong Jae Lee, Su Hyun Bae, Ho Joon Shin, Tae Won Ha, Joo Young Park
  • Publication number: 20200028460
    Abstract: An apparatus for controlling an inverter for driving a motor including a processor which includes: a current processor configured to generate a voltage command for allowing a current detection value, generated by measuring a current provided from an inverter to a motor, to follow a current command for driving the motor; a voltage modulator configured to generate a pulse width modulation signal for controlling on and off states of a switching element within the inverter with a predetermined switching frequency based on the voltage command; and a frequency determining processor configured to randomly change the switching frequency based on driving information of the motor.
    Type: Application
    Filed: November 21, 2018
    Publication date: January 23, 2020
    Inventors: Yong Jae LEE, Tae Won HA, Su Hyun BAE, Ho Joon SHIN, Sung Kyu KIM, Joo Young PARK
  • Publication number: 20190131417
    Abstract: A semiconductor device includes a substrate having first and second active regions with a field insulating layer therebetween that contacts the first and second active regions, and a gate electrode on the substrate and traversing the first active region, the second active region, and the field insulating layer. The gate electrode includes a first portion over the first active region, a second portion over the second active region, and a third portion in contact with the first and second portions. The gate electrode includes an upper gate electrode having first through third thicknesses in the first through third portions, respectively, where the third thickness is greater than the first thickness, and smaller than the second thickness.
    Type: Application
    Filed: April 20, 2018
    Publication date: May 2, 2019
    Inventors: Se Ki HONG, Ju Youn KIM, Jin-Wook KIM, Tae Eung YOON, Tae Won HA, Jung Hoon SEO, Seul Gi YUN
  • Publication number: 20190088779
    Abstract: A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium.
    Type: Application
    Filed: November 16, 2018
    Publication date: March 21, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-Soo KIM, Gi-Gwan PARK, Sang-Koo KANG, Koung-Min RYU, Jae-Hoon LEE, Tae-Won HA
  • Patent number: 10177253
    Abstract: A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: January 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Soo Kim, Gi-Gwan Park, Sang-Koo Kang, Koung-Min Ryu, Jae-Hoon Lee, Tae-Won Ha
  • Publication number: 20180366582
    Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
    Type: Application
    Filed: August 22, 2018
    Publication date: December 20, 2018
    Inventors: Ju-Youn Kim, Hyung-Soon Jang, Jong-Mil Youn, Tae-Won Ha
  • Patent number: 10084088
    Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: September 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Youn Kim, Hyung-Soon Jang, Jong-Mil Youn, Tae-Won Ha
  • Publication number: 20180211887
    Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.
    Type: Application
    Filed: March 22, 2018
    Publication date: July 26, 2018
    Inventors: Ju Youn KIM, Ji Hwan AN, Tae Won HA, Se Ki HONG
  • Patent number: 9972544
    Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: May 15, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ju Youn Kim, Ji Hwan An, Tae Won Ha, Se Ki Hong