Abstract: A method of fabricating a semiconductor device includes forming an inter-metal dielectric layer including a first trench and a second trench which are spaced from each other on a substrate, forming a first dielectric layer along the sides and bottom of the first trench, forming a second dielectric layer along the sides and bottom of the second trench, forming first and second lower conductive layers on the first and second dielectric layers, respectively, forming first and second capping layers on the first and second lower conductive layer, respectively, performing a heat treatment after the first and second capping layers have been formed, removing the first and second capping layers and the first and second lower conductive layers after performing the heat treatment, and forming first and second metal gate structures on the first and second dielectric layers, respectively.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device may include a first gate electrode being formed on a substrate and having a first ratio of a width of an upper surface to a width of a lower surface, a second gate electrode being formed on the substrate and having a second ratio of the width of the upper surface to the width of the lower surface, wherein the second ratio is less than the first ratio, a first gate spacer being formed on a sidewall of the first gate electrode, a second gate spacer being formed on a sidewall of the second gate electrode and an interlayer insulating film covering the first gate spacer and the second gate spacer.

Abstract: A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: An integrated circuit device with metal gates including diffusion barrier layers and fabricating methods thereof are provided. The device may include a gate insulating film, a first conductivity type work function regulating film on the gate insulating film and a metal gate pattern on the first conductivity type work function regulating film. The device may include a cobalt film between the gate insulating film and the metal gate pattern to reduce diffusion from the metal gate pattern into the gate insulating film.

Abstract: A method of fabricating a semiconductor device includes forming an inter-metal dielectric layer including a first trench and a second trench which are spaced from each other on a substrate, forming a first dielectric layer along the sides and bottom of the first trench, forming a second dielectric layer along the sides and bottom of the second trench, forming first and second lower conductive layers on the first and second dielectric layers, respectively, forming first and second capping layers on the first and second lower conductive layer, respectively, performing a heat treatment after the first and second capping layers have been formed, removing the first and second capping layers and the first and second lower conductive layers after performing the heat treatment, and forming first and second metal gate structures on the first and second dielectric layers, respectively.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract: A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness. A first work function control layer is on the first barrier layer. A second barrier layer is present on the first work function control layer, the second barrier layer having a second thickness that is less than the first thickness.

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.