Abstract: A thin-film semiconductor device manufacturing method according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating film above the substrate; forming an amorphous film (amorphous silicon film) above the substrate; forming a crystalline film (crystalline silicon film) including a first crystal and a second crystal, by crystallizing the amorphous film, the first crystal (i) containing subgrains formed with different crystal orientations in a single crystal and (ii) including a subgrain boundary formed by plural crystal planes between the subgrains, the second crystal having an average crystal grain size smaller than an average crystal grain size of the first crystal; thinning the crystalline film; and forming a source electrode and a drain electrode above the substrate.

Abstract: The invention provides a laser light detection circuit that prevents a peak output occurring when the circuit switches between the operation stop mode and the operation mode so as to prevent the breakdown or malfunction of the next-connected circuit. A laser light detection circuit has a differential amplifier that amplifies and outputs a signal corresponding to the intensity of laser light, a drive transistor having a base to which the output of the differential amplifier is applied, a second constant-current source connected to the emitter of the drive transistor, an output transistor having a base connected to the emitter of the drive transistor, a bypass transistor connected between the emitter of the drive transistor and the ground, and a control circuit. The control circuit forms a bypass current route from the second constant-current source to the ground through the bypass transistor by turning on the bypass transistor when the circuit switches from the operation stop mode to the operation mode.

Abstract: Provided is a photoelectric smoke sensor capable of correcting a sensitivity according to a state of contamination. The photoelectric smoke sensor includes: a storage section (6) for storing a zero detection value VN and an initial zero detection value; a moving average value calculating section (51) for calculating a moving average value of detection AD values output from a detection portion (1, 2, 3); a zero detection value updating section (52) for calculating a new zero detection value VN when a sensitivity of the detection portion is decreased as compared with that in an initial state, and in addition, when a rate of change in the moving average value with respect to the zero detection value VN exceeds a predetermined value; a detection AD value correcting section (53) for correcting the detection value; and a smoke-density computing section (54) for converting the corrected detection value into smoke-density data.

Abstract: A semiconductor device includes: a semiconductor substrate in which a trench is formed; a source region and a drain region each of which is buried in the trench and contains an impurity of the same conductive type; a semiconductor FIN buried in the trench and provided between the source and drain regions; a gate insulating film provided on a side surface of the semiconductor FIN as well as the upper surface of the semiconductor FIN; and a gate electrode formed on the gate insulating film.

Abstract: A method of manufacturing a thin-film semiconductor device according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a first insulating film on the gate electrode; forming a semiconductor thin film that is to be a channel layer, on the first insulating film; forming a second insulating film on the semiconductor thin film; irradiating the second insulating film with a beam so as to increase a transmittance of the second insulating film; and forming a source electrode and a drain electrode above the channel layer.

Abstract: A thin-film semiconductor device according to the present disclosure includes: a substrate; a gate electrode formed above the substrate; a gate insulating film formed on the gate electrode; a channel layer that is formed of a polycrystalline semiconductor layer on the gate insulating film; an amorphous semiconductor layer formed on the channel layer and having a projecting shape in a surface; and a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, and a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source and drain electrodes.

Abstract: A nanowire transistor according to the present invention includes: at least one nanowire 13 including a core portion 13a that functions as a channel region and an insulating shell portion 13b that covers the surface of the core portion 13a; source and drain electrodes 14 and 15, which are connected to the nanowire 13; and a gate electrode 21 for controlling conductivity in at least a part of the core portion 13a of the nanowire 13. The core portion 13a is made of semiconductor single crystals including Si and has a cross section with a curved profile on a plane that intersects with the longitudinal axis thereof. The insulating shell portion 13b is made of an insulator including Si and functions as at least a portion of a gate insulating film.

Abstract: In order to achieve an object to reduce a surge voltage and suppress noise generation, the present invention provides a DC-DC converter with a snubber circuit, which boosts a voltage Vi of a DC power supply. The snubber circuit includes: a series circuit connected to both ends of a smoothing capacitor Co and including a snubber capacitor Cs and a snubber resistor Rs; a snubber diode Ds1 connected to a node at which the snubber capacitor Cs and the snubber resistor Rs are connected, and to a node at which a reactor Lr1 and an additional winding 1b of a transformer T1 are connected; and a snubber diode Ds2 connected to the node at which the snubber capacitor Cs and the snubber resistor Rs are connected, and to a node at which a reactor Lr2 and an additional winding 2b of a transformer T2 are connected.

Abstract: A thin-film transistor used for a display device includes a gate electrode formed on an insulating substrate; a gate insulating film formed on the substrate so as to cover the gate electrode; a semiconductor layer composed of first semiconductor layer and second semiconductor layer formed on the gate insulating film; an ohmic contact layer formed on the semiconductor layer; and a source electrode and a drain electrode formed on the ohmic contact layer so as to be spaced from each other. The transistor further includes an etching stopper made of spin-on glass (SOG) on a channel-forming region of the semiconductor layer.

Abstract: A substrate; a gate electrode formed above the substrate; a gate insulating film formed above the gate electrode; a crystalline silicon semiconductor layer formed above the gate insulating film; an amorphous silicon semiconductor layer formed above the crystalline silicon semiconductor layer; an organic protective film made of an organic material and formed above the amorphous silicon semiconductor layer; and a source electrode and a drain electrode formed above the amorphous silicon semiconductor layer interposing the organic protective film are included, and a charge density of the negative carriers in the amorphous silicon semiconductor layer is at least 3×1011 cm?2.

Abstract: A thin-film semiconductor device includes, in order, a substrate, a gate electrode, a gate insulating film, a first channel layer, and a second channel layer. The second channel layer includes a protrusion between first top surface end portions. The protrusion has first lateral surfaces that each extend between one of the first top surface end portions and a top surface of the protrusion. An insulation layer is on the top surface of the protrusion. The insulation layer has second lateral surfaces that each extend to one of second top surface end portions of the insulation layer. Two contact layers are each on one of the second top surface end portions of the insulation layer, adjacent one of the second lateral surfaces of the insulation layer, adjacent one of the first lateral surfaces of the protrusion, and on one of the first top surface end portions of the second channel layer. A source electrode is on one of the two contact layers, and a drain electrode is on the other of the two contact layers.

Abstract: A crystalline silicon thin film is formed by irradiating a silicon thin film with a laser beam. The laser beam is a continuous wave laser beam. An intensity distribution of the laser beam in a first region about a center of the intensity distribution is symmetric on an anterior side and a posterior side of the center. The intensity distribution in a second region about the center is asymmetric on the anterior side and the posterior side. The first region is from the maximum intensity of the laser beam at the center to an intensity half of the maximum intensity. The second region is at most equal to the half of the maximum intensity of the laser beam. In the second region, an integral intensity value on the posterior side is larger than on the anterior side.

Abstract: A variable gain amplifier circuit includes: an operational amplifier having a non-inverting input terminal applied with a predetermined voltage; a feedback resistor having one end connected to an inverting input terminal of the operational amplifier and the other end connected to an output terminal of the operational amplifier; and a variable resistor having one end applied with an input voltage and the other end connected to the inverting input terminal of the operational amplifier.

Abstract: According to a method of the present invention for manufacturing a semiconductor piece, at least two semiconductor layers (12) are first formed on a substrate (10) by stacking a sacrificial layer (11) and the semiconductor layer (12) on the substrate (10) in this order and repeating this stacking. Next, the semiconductor layers (12) are divided into pieces by etching part of the sacrificial layers (11) and part of the semiconductor layers (12). Then, the pieces are separated from the substrate by removing the sacrificial layers (11).

Abstract: A nanowire transistor according to the present invention includes: at least one nanowire 13 including a core portion 13a that functions as a channel region and an insulating shell portion 13b that covers the surface of the core portion 13a; source and drain electrodes 14 and 15, which are connected to the nanowire 13; and a gate electrode 21 for controlling conductivity in at least a part of the core portion 13a of the nanowire 13. The core portion 13a is made of semiconductor single crystals including Si and has a cross section with a curved profile on a plane that intersects with the longitudinal axis thereof. The insulating shell portion 13b is made of an insulator including Si and functions as at least a portion of a gate insulating film.

Abstract: A nanowire according to the present invention includes: a nanowire body made of a first material; and a plurality of semiconductor particle made of a second material and being contained in at least a portion of the interior of the nanowire body.

Abstract: A method for fabricating a semiconductor nanowire that has first and second regions is provided. A catalyst particle is put on a substrate. A first source gas is introduced, thereby growing the first region from the catalyst particle via a vapor-liquid-solid phase growth. A protective coating is formed on a sidewall of the first region, and a second source gas is introduced to grow the second region extending from the first region via the liquid-solid-phase growth.

Abstract: A communication apparatus including a memory, a processor, and a communication interface, wherein the memory stores a number of hops on a communication route from the communication apparatus to another communication apparatus, the processor selects from at least two communication protocols a communication protocol having a shorter transfer time than another communication protocol, where the transfer time is predicted based on the number of hops on the communication route from the communication apparatus to the other communication apparatus and a data size of the data, and controls transmission of the data using the selected communication protocol, and the communication interface transmits the data to the other communication apparatus based on the control of the processor.

Abstract: The present invention provides a DC-DC converter including a first series circuit connected to both ends of a first switch and formed of a winding of a first transformer, a first reactor, a first diode, and a smoothing capacitor, a second diode connected to a connection point of a primary winding of the first transformer, the winding of the first transformer and the first switch, and to one end of the smoothing capacitor, a second series circuit connected to both ends of a second switch and formed of a winding of a second transformer, a second reactor, a third diode, and the smoothing capacitor, a fourth diode connected to a connection point of a primary winding of the second transformer, the winding of the second transformer and the second switch, and to the one end of the smoothing capacitor, a third reactor connected to both ends of a series circuit of a secondary winding of the first transformer and a secondary winding of the second transformer, and a control circuit which alternately turns on the first s

Abstract: A source electrode 105 which is connected to a portion of at least one semiconductor nanostructure 103 among a plurality of semiconductor nanostructures, a drain electrode 106 connected to another portion of the semiconductor nanostructure 103, and a gate electrode 102 capable of controlling electrical conduction of the semiconductor nanostructure 103 are included. The semiconductor nanostructures 103 include a low concentration region 108 having a relatively low doping concentration and a pair of high concentration regions 107 having a higher doping concentration than that of the low concentration region 108 and being connected to both ends of the low concentration region 108.