Abstract: [Problem] To provide a compound which has an excellent activity to modulate the functions of CCR4 or TARC and/or MDC and can be used for the prevention and/or treatment of various inflammatory diseases, allergic diseases, autoimmune diseases and the like. [Means for Resolution] An acylaminopiperidine compound represented by the formula (I) or a pharmaceutically acceptable salt thereof. [Symbols in the formula represent the following meanings; A: a single bond or C1-C6 alkylene, R1: phenyl which may be substituted, etc., R2: —H or C1-C6 alkyl, R3: —H, C1-C6 alkyl or C3-C8 cycloalkyl, R4: pyrrolidin-2-yl which may be substituted, etc., and D: benzene ring or pyrazole ring].

Abstract: The voltage stabilizer for stabilizing a voltage of a circuit includes a first resistor, a second resistor, a voltage controller, and a current supply unit. The voltage controller keeps a voltage of the first resistor constant. The current supply unit supplies a first current to between the first resistor and the second resistor when a second current in the circuit becomes equal to or larger than a predetermined value.

Abstract: A display device comprising a plurality of scan signal lines; a plurality of picture signal lines three-dimensionally intersecting the plurality of scan signal lines; and numerous TFT elements arranged in a matrix; and having a display panel in which each of the TFT elements has a gate connected to one of the plurality of scan signal lines, and a drain or source connected to one of the plurality of picture signal lines; wherein the TFT elements respectively differ in terms of channel width, channel length, or both, depending on a distance from a signal input terminal of the scan signal line to which the gate is connected and a distance from a signal input terminal of the picture signal line to which one of the drain and the source is connected.

Abstract: An exposure method that suppresses distribution of pattern shapes at the time of exposure. In a manufacturing method for a display unit, a layer forming a reference for pattern arrangement is determined among layers formed on a panel. An arrangement of a pattern in a layer above the reference layer is determined using a value obtained from distribution of the pattern arrangement in the reference layer.

Abstract: An object of the present invention is to readily minimize inhomogeneity in image quality in a display field on one liquid crystal display panel.

Abstract: In a liquid crystal display device, each pixel region formed over a liquid crystal side of one substrate out of respective substrates which are arranged to face each other with liquid crystal therebetween includes pixel electrodes to which a video signal is supplied from a drain signal line through a switching element driven in response to a scanning signal from a gate signal line and capacitive elements which are formed between the pixel electrodes and a capacitive signal line by way of a dielectric film. In such a constitution, the pixel region is divided into a plurality of regions, and video signals are supplied to respective pixel electrodes and capacitive elements in respective regions through paths which are branched from the switching element.

Abstract: The present invention is intended to prevent the flow of a large input current into a DC/DC converter, to which power is fed from a power supply, before a supply voltage delivered from the power supply reaches a rated output voltage. A control unit included in the DC/DC converter includes a steady state detection block that detects a condition in which an input voltage to be applied to the DC/DC converter has been stabilized, and inhibits the power feed from the DC/DC converter until the input voltage delivered from a power supply in a preceding stage is stabilized.

Abstract: The present invention is intended to prevent the flow of a large input current into a DC/DC converter, to which power is fed from a power supply, before a supply voltage delivered from the power supply reaches a rated output voltage. A control unit included in the DC/DC converter includes a steady state detection block that detects a condition in which an input voltage to be applied to the DC/DC converter has been stabilized, and inhibits the power feed from the DC/DC converter until the input voltage delivered from a power supply in a preceding stage is stabilized.

Abstract: In a liquid crystal display device, each pixel region formed over a liquid crystal side of one substrate out of respective substrates which are arranged to face each other with liquid crystal therebetween includes pixel electrodes to which a video signal is supplied from a drain signal line through a switching element driven in response to a scanning signal from a gate signal line and capacitive elements which are formed between the pixel electrodes and a capacitive signal line by way of a dielectric film. In such a constitution, the pixel region is divided into a plurality of regions, and video signals are supplied to respective pixel electrodes and capacitive elements in respective regions through paths which are branched from the switching element.

Abstract: The voltage stabilizer for stabilizing a voltage of a circuit includes a first resistor, a second resistor, a voltage controller, and a current supply unit. The voltage controller keeps a voltage of the first resistor constant. The current supply unit supplies a first current to between the first resistor and the second resistor when a second current in the circuit becomes equal to or larger than a predetermined value.

Abstract: A regulator circuit capable of reducing an increase in an output voltage during a sudden drop in a load current without increasing the power consumption during a steady state. When a current in load IL1 changes suddenly from a large current to a minute current during a steady state, electric charges are charged in capacitor CL1 due to a response delay of the negative feedback control, and an output voltage becomes higher than a target voltage. Then, voltage of node N34 drops, diode 31 gets turned off, and a voltage is held in capacitor 32. As a result, output of comparator 42 changes from a low level to a high level, and n-type MOS transistor 82 gets turned on. In addition, when the voltage between the gate and the source of n-type MOS transistor 50 becomes lower than the voltage of voltage source 71 due to a drop in the voltage of node N34, comparator 72 is also reverted to the high level.

Abstract: The objective of this invention is to provide a DC-DC converter characterized by the fact that by correcting the loop gain corresponding to the switching of the operating mode, the variation in the output voltage that accompanies the switching of the operating mode can be minimized. Loop gain correction section 50 for correcting the gain of the feedback loop that controls output voltage VOUT is used, so that when the operating mode is switched in response to change in the input voltage VIN, the gain of the feedback loop is reduced by means of loop gain correction section 50. As a result, the duty ratio of pulse-width modulation signal VPWM1 output from pulse-width modulation portion 20 is decreased, and output voltage VOUT is controlled to be reduced. Consequently, the transient rise of output voltage VOUT that accompanies the switching of the operating mode can be avoided, the stability of the output voltage can be improved, and the influence on the load circuit can be prevented.

Abstract: In a liquid crystal display device, each pixel region formed over a liquid crystal side of one substrate out of respective substrates which are arranged to face each other with liquid crystal therebetween includes pixel electrodes to which a video signal is supplied from a drain signal line through a switching element driven in response to a scanning signal from a gate signal line and capacitive elements which are formed between the pixel electrodes and a capacitive signal line by way of a dielectric film. In such a constitution, the pixel region is divided into a plurality of regions, and video signals are supplied to respective pixel electrodes and capacitive elements in respective regions through paths which are branched from the switching element.

Abstract: The objective of this invention is to provide a DC-DC converter characterized by the fact that by correcting the loop gain corresponding to the switching of the operating mode, the variation in the output voltage that accompanies the switching of the operating mode can be minimized. Loop gain correction section 50 for correcting the gain of the feedback loop that controls output voltage VOUT is used, so that when the operating mode is switched in response to change in the input voltage VIN, the gain of the feedback loop is reduced by means of loop gain correction section 50. As a result, the duty ratio of pulse-width modulation signal VPWM1 output from pulse-width modulation portion 20 is decreased, and output voltage VOUT is controlled to be reduced. Consequently, the transient rise of output voltage VOUT that accompanies the switching of the operating mode can be avoided, the stability of the output voltage can be improved, and the influence on the load circuit can be prevented.

Abstract: An inrush current suppressing device capable of stabilizing inrush current suppression control to improve the reliability and quality of the control. A current limiting element limits an input current flowing to a power supply circuit in accordance with an input current limit value. A current detecting section detects the input current flowing through the current limiting element and converts the current to a voltage signal, and a sloping voltage signal generating section generates a sloping voltage signal proportional to a time elapsed after the start of power supply. An input current limiting section compares the voltage signal with the sloping voltage signal, and outputs the input current limit value for suppressing the inrush current while gradually increasing the limit value with rise in the sloping voltage signal during a period in which the voltage signal is higher in level than the sloping voltage signal after the start of power supply.

Abstract: An inrush current suppressing device capable of stabilizing inrush current suppression control to improve the reliability and quality of the control. A current limiting element limits an input current flowing to a power supply circuit in accordance with an input current limit value. A current detecting section detects the input current flowing through the current limiting element and converts the current to a voltage signal, and a sloping voltage signal generating section generates a sloping voltage signal proportional to a time elapsed after the start of power supply. An input current limiting section compares the voltage signal with the sloping voltage signal, and outputs the input current limit value for suppressing the inrush current while gradually increasing the limit value with rise in the sloping voltage signal during a period in which the voltage signal is higher in level than the sloping voltage signal after the start of power supply.

Abstract: To provide a regulator circuit capable of preventing oscillation of output voltage when an overcurrent regulating function is activated voltage across resistor 31 is lower than the voltage of voltage source VR2, output of hysteresis comparator 51 is low-level, n-type MOS transistor 63 is turned off, and capacitor 62 is charged to the voltage level of power supply line Vcc under the normal condition. On the other hand, under an overcurrent condition, hysteresis comparator 51 becomes high-level, n-type MOS transistor 63 is turned on, and the charge in capacitor 62 is discharged. Because differential amplifier circuit 41 selects the signal with a lower voltage out of 2 positive side input signals, negative feedback control is applied to the output voltage in reference to voltage source VR1 under the normal condition, and voltage source 64 under the overcurrent condition.

Abstract: A switching power supply circuit display an oscillation frequency will not be lowered with a light load. After the first output transistor 11 turns from conduction to cut-off, when the second output transistor 12 conducts, first, by means of the energy accumulated in the inductance element 13, a current will flow from the source terminal toward the drain terminal of the second output transistor 12, and then by means of the discharge of the output capacitor 14, a current will flow from the drain terminal toward the source terminal. Next, in case of a light load, the second output transistor 12, before being cut off by the control circuit 20, is cut off by the frequency control unit 50. By means of the discharge of the output capacitor 14, the lowering of oscillation frequency in case of a light load is prevented.

Abstract: According to a switching-type DC-DC converter of the present invention, a switching element (MOSFET, etc.) on the primary side for converting a DC input voltage into an AC voltage is subjected to switching operation according to a first control signal of a fixed frequency and a fixed ON/OFF ratio, and also a switching element (MOSFET, etc.) on the secondary side for rectifying the AC voltage is subjected to switching operation according to a second control signal in synchronism with a delay signal obtained by delaying the first control signal by a predetermined period of time, to realize a so-called zero-cross switch in the switching element on the primary side. Thus, the power loss due to a response time of the switching element is decreased.

Abstract: A regulator circuit capable of reducing an increase in an output voltage during a sudden drop in a load current without increasing the power consumption during a steady state. When a current in load IL1 changes suddenly from a large current to a minute current during a steady state, electric charges are charged in capacitor CL1 due to a response delay of the negative feedback control, and an output voltage becomes higher than a target voltage. Then, voltage of node N34 drops, diode 31 gets turned off, and a voltage is held in capacitor 32. As a result, output of comparator 42 changes from a low level to a high level, and n-type MOS transistor 82 gets turned on. In addition, when the voltage between the gate and the source of n-type MOS transistor 50 becomes lower than the voltage of voltage source 71 due to a drop in the voltage of node N34, comparator 72 is also reverted to the high level.