Patents by Inventor Takashi Kurihara

Takashi Kurihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7705943
    Abstract: The liquid crystal display device includes a first substrate 1110a, a second substrate 1110b placed to face the first substrate, and a liquid crystal layer 1120 interposed between the first substrate and the second substrate. The liquid crystal display device has a plurality of pixels each including a first electrode 1111 formed on the first substrate, a second electrode 1131 formed on the second substrate, and the liquid crystal layer interposed between the first electrode and the second electrode. The second electrode 1131 has at least one opening 1114 formed at a predetermined position in the pixel, the first substrate has a shading region in gaps between the plurality of pixels, and a wall structure 1115 is placed regularly on the surface of the first substrate facing the liquid crystal layer in the shading region.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: April 27, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Kume, Nobukazu Nagae, Kazuhiko Tamai, Noriaki Onishi, Takashi Kurihara
  • Patent number: 7697099
    Abstract: A liquid crystal display device including a first substrate 110a, a second substrate 110b placed to face the first substrate, a liquid crystal layer 120 interposed between the first and second substrates, a first electrode 111 formed on the first substrate, a second electrode 131 formed on the second substrate, an interlayer insulating film 115a placed between the first electrode and the first substrate, and a wall structure 115b formed integrally with the interlayer insulating film. The liquid crystal display device has a plurality of pixels each including the first electrode, the second electrode and the liquid crystal layer interposed between the first and second electrodes. A shading region surrounds each of the plurality of pixels, and the wall structure is placed regularly in the shading region. A groove structure 415a may be formed in place of the wall structure.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: April 13, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Kume, Noriaki Onishi, Kazuhiko Tamai, Nobukazu Nagae, Hiroaki Kojima, Takashi Kurihara, Nobuaki Yamada
  • Patent number: 7691473
    Abstract: The present invention relates to a fiber-reinforced composite material and a method for manufacturing the same, and also relates to a transparent multilayered sheet, a circuit board, and an optical waveguide.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: April 6, 2010
    Assignees: Rohm Co., Ltd., Mitsubishi Chemical Corporation, Hitachi, Ltd., Pioneer Corporation
    Inventors: Hiroyuki Yano, Junji Sugiyama, Masaya Nogi, Shin-ichiro Iwamoto, Keishin Handa, Akira Nagai, Takao Miwa, Yoshitaka Takezawa, Toshiyuki Miyadera, Takashi Kurihara, Tohru Matsuura, Nobutatsu Koshoubu, Tohru Maruno
  • Patent number: 7677059
    Abstract: A fabrication method of an optical fiber using as a core material tellurite glass. The method includes a first process of molding a tellurite glass melt into a mold, the mold having a plurality of convex portions defining an inner wall, which portions run parallel to each other in a longitudinal direction in order to make a polygon columnar glass preform, and a second process of inserting the glass preform into a cylindrical jacket tube made of tellurite glass and carrying out fiber-drawing under pressure so as to maintain or enlarge air holes which are gaps generated between the glass preform and the jacket tube.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: March 16, 2010
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Atsushi Mori, Masao Kato, Kouji Enbutsu, Shinichi Aozasa, Kiyoshi Oikawa, Takashi Kurihara, Kazuo Fujiura, Makoto Shimizu, Kouji Shikano
  • Patent number: 7660095
    Abstract: A surge protector coated with an oxide layer having an excellent chemical stability at the high temperature range and excellent adherence with respect to main discharge electrodes. The surge protector includes a column-shaped ceramic member that has a conductive film divided by a discharge gap interposed therebetween; a pair of main discharge electrode members opposite to each other on both ends of the column-shaped ceramic member to come in contact with the conductive film; and a cylindrical ceramic tube which is fitted to the pair of main discharge electrode members opposite to each other to seal both the column-shaped ceramic member and sealing gas inside thereof. Oxide films are formed on main discharge surfaces of at least the protrusive supporting portions of the pair of main discharge electrode members opposite to each other, by performing an oxidation treatment, respectively.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: February 9, 2010
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yasuhiro Shato, Tuyoshi Ogi, Miki Adachi, Sung-Gyoo Lee, Takashi Kurihara, Toshiaki Ueda
  • Publication number: 20090267614
    Abstract: There is provided a physical property measuring method for a TFT liquid crystal panel, includes an impedance setting step of setting the impedance between the source and drain of a TFT of the TFT liquid crystal panel to be less than or equal to a predetermined value, a voltage application step of applying a voltage that cyclically varies to a liquid crystal layer of the TFT liquid crystal panel. And the method further includes a physical property measuring step of measuring a transient current flowing through the liquid crystal layer to which the voltage that cyclically varies is applied in the voltage application step to measure physical properties of the liquid crystal layer.
    Type: Application
    Filed: July 7, 2009
    Publication date: October 29, 2009
    Applicants: TOYO CORPORATION, SHARP KABUSHIKI KAISHA
    Inventors: Masaru Inoue, Kunihiko Sasaki, Takashi Kurihara, Yasuhiro Kume
  • Publication number: 20090258460
    Abstract: A manufacturing method of a semiconductor device includes a film state underfill resin adhering step wherein film state underfill resin in a semi-cured state is adhered on the first surface of the board main body without forming a gap between the first surface of the board main body and the pad; a flattening step wherein an upper surface of the film state underfill resin is flattened; a chip connecting step wherein the semiconductor chip is pressed onto the upper surface of the film state underfill resin after the flattening step so that the semiconductor chip is flip chip connected to the pad; and an underfill resin forming step wherein the film state underfill resin is cured so that the underfill resin is formed between the semiconductor chip and the wiring board.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 15, 2009
    Inventors: Kiyoshi Oi, Takashi Kurihara
  • Patent number: 7591895
    Abstract: A method and an apparatus for producing crystals wherein crystal quality can be kept and a crystal composition is uniformed from a growth early stage to a growth last stage are provided. In an apparatus for producing crystals wherein the crystals 13 are grown from a liquefying raw material 12 in a crucible retained in a furnace and slowly cooling the raw material 12 in the crucible 11 from below upward, the apparatus comprises a raw material supply apparatus 18 which supplies a resupply raw material, and a reflection plate 20 placed above the crucible 11, which liquefies the resupply raw material 19 supplied from the raw material supply apparatus 18 and drops it as a liquid into the crucible.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: September 22, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Masahiro Sasaura, Hiroki Kohda, Kazuo Fujiura, Takashi Kobayashi, Tadayuki Imai, Takashi Kurihara
  • Publication number: 20090201454
    Abstract: The liquid crystal display device includes a first substrate 1110a, a second substrate 1110b placed to face the first substrate, and a liquid crystal layer 1120 interposed between the first substrate and the second substrate. The liquid crystal display device has a plurality of pixels each including a first electrode 1111 formed on the first substrate, a second electrode 1131 formed on the second substrate, and the liquid crystal layer interposed between the first electrode and the second electrode. The second electrode 1131 has at least one opening 1114 formed at a predetermined position in the pixel, the first substrate has a shading region in gaps between the plurality of pixels, and a wall structure 1115 is placed regularly on the surface of the first substrate facing the liquid crystal layer in the shading region.
    Type: Application
    Filed: April 3, 2009
    Publication date: August 13, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Kume, Nobukazu Nagae, Kazuhiko Tamai, Noriaki Onishi, Takashi Kurihara
  • Publication number: 20090147199
    Abstract: In a liquid crystal display element of the present invention, the aligning capability for imparting pre-tilt angles to a liquid crystal material is imparted only to the surface of the alignment film of one of the substrates, the material layer having dielectric anisotropy includes a chiral material and a liquid crystal material with a nematic liquid crystal phase, 0.25?d/p?0.50 is satisfied assuming that the thickness of the material layer having the dielectric anisotropy is d and the chiral pitch length of the liquid crystal material is p, and 1000×d/p??n×d is satisfied assuming that the refractive index anisotropy of the liquid crystal material is ?n.
    Type: Application
    Filed: September 12, 2006
    Publication date: June 11, 2009
    Inventors: Yasuhiro Kume, Takashi Kurihara, Kazuhiko Tamai, Takaaki Okamoto, Shinya Saeki
  • Publication number: 20090134530
    Abstract: There is provided a wiring substrate. The wiring substrate includes a wiring member and a reinforcing layer. The wiring member is formed by layering insulating layers and wiring layers and has connection pads thereon. The reinforcing layer is provided on the wiring member to surround the connection pads and has a plurality of concave-convex portions thereon.
    Type: Application
    Filed: November 20, 2008
    Publication date: May 28, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takashi Kurihara, Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20090123726
    Abstract: The present invention relates to a fiber-reinforced composite material and a method for manufacturing the same, and also relates to a transparent multilayered sheet, a circuit board, and an optical waveguide.
    Type: Application
    Filed: October 14, 2008
    Publication date: May 14, 2009
    Applicants: ROHM CO., LTD., MITSUBISHI CHEMICAL CORPORATION, HITACHI, LTD., PIONEER CORPORATION
    Inventors: Hiroyuki YANO, Junji Sugiyama, Masaya Nogi, Shin-ichiro Iwamoto, Keishin Handa, Akira Nagai, Takao Miwa, Yoshitaka Takezawa, Toshiyuki Miyadera, Takashi Kurihara, Tohru Matsuura, Nobutatsu Koshoubu, Tohru Maruno
  • Publication number: 20090115958
    Abstract: A liquid crystal display element of the present invention is arranged so that a material layer having dielectric anisotropy includes a chiral material and a liquid crystal material with a nematic liquid crystal phase, and 0.25?d/p?0.50 is satisfied assuming that the thickness of the material layer is d and the chiral pitch length of the liquid crystal material is p.
    Type: Application
    Filed: September 12, 2006
    Publication date: May 7, 2009
    Inventors: Takashi Kurihara, Yasuhiro Kume, Kazuhiko Tamai, Takaaki Okamoto, Shinya Saeki
  • Publication number: 20090060438
    Abstract: An optical fiber, which has a zero-material dispersion wavelength equal to or greater than 2 ?m, and a high nonlinear susceptibility ?3 equal to or greater than 1×10?12 esu, and uses tellurite glass having sufficient thermal stability for processing into a low loss fiber, employs a PCF structure or HF structure having strong confinement into a core region. This enables light to propagate at a low loss. The size and geometry of air holes formed in the core region, and the spacing between adjacent air holes make it possible to control the zero dispersion wavelength within an optical telecommunication window (1.2-1.7 ?m), and to achieve large nonlinearity with a nonlinear coefficient ? equal to or greater than 500 W?1 km?1.
    Type: Application
    Filed: October 30, 2008
    Publication date: March 5, 2009
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Atsushi Mori, Masao Kato, Kouji Enbutsu, Shinichi Aozasa, Kiyoshi Oikawa, Takashi Kurihara, Kazuo Fujiura, Makoto Shimizu, Kouji Shikano
  • Publication number: 20090064066
    Abstract: A method, apparatus, and recording medium including computer instructions for estimating the size of a core section of a semiconductor integrated circuit are provided. The method includes calculating a total net length of wires of nets and usable channel length of the core section by referring to circuit information and a layout parameter that are used to design the semiconductor integrated circuit. The method includes determining a size of the core section that satisfies conditions based on total net length and usable channel length.
    Type: Application
    Filed: October 15, 2008
    Publication date: March 5, 2009
    Applicant: Fujitsu Limited
    Inventors: Takashi KURIHARA, Kazutaka TAKEUCHI
  • Patent number: 7492975
    Abstract: The present invention provides an optical switch, an optical modulator, and a wavelength variable filter each of which has a simple configuration, which requires only a low driving voltage, which is independent of polarization, and which can operate at high speed. An optical switch according to the present invention includes a 3-dB coupler (16) placed on an input, a 3-dB coupler (17) placed on an output, and two optical waveguides connecting the input-side 3-dB coupler and the output-side 3-dB coupler together. The optical switch also includes a phase modulating section (18) that applies electric fields to one or both of the two optical waveguides. At least two optical waveguides are a crystal material including KTaxNb1-xO3 (0<x<1) and KxLi1-xTayNb1-yO3 (0<x<1, 0<y<1), or KTaxNb1-xO3 or KxLi1-xTayNb1-yO3.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: February 17, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Seiji Toyoda, Kazuo Fujiura, Masahiro Sasaura, Koji Enbutsu, Makoto Shimokozono, Tadayuki Imai, Akiyuki Tate, Touru Matsuura, Takashi Kurihara, Hiroshi Fushimi
  • Publication number: 20090023247
    Abstract: After plural semiconductor elements are stacked to form a stacked body P, side wirings are formed on the side surface of the stacked body P, thereby manufacturing a semiconductor apparatus in which the respective semiconductor elements are electrically connected to one another. In this case, as the semiconductor element, a semiconductor element 10 is employed in which a gold wire 16 with its one end connected to an electrode terminal of the semiconductor element is extended out to the side surface. A conductive paste 36 containing conductive particles applied over a predetermined length of a transferring wire 30 is transferred to the side surface of the stacked body P so that the gold wires 16 extended out to the side surfaces of the semiconductor elements 10, 10, 10 are connected, thereby forming the side wirings.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Kei MURAYAMA, Mitsutoshi HIGASHI
  • Publication number: 20090020889
    Abstract: A plurality of quadrilateral-shaped semiconductor elements are stacked on the one surface of a circuit substrate. A side surface wiring for making electrical connection between each of the electrode terminals of the semiconductor elements and a pad formed on the circuit substrate is formed by applying a conductive paste containing conductive particles. A metal wire whose one end is connected to the electrode terminal is extended along a tapered surface formed by cutting off an edge of the electrode terminal surface on which the electrode terminal is formed among edges formed along each of the sides of the semiconductor element. At least a part of the metal wire extended from each of the electrode terminals of the semiconductor elements to the tapered surface is electrically connected to the side surface wiring.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Kei MURAYAMA, Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Misutoshi HIGASHI
  • Publication number: 20090020887
    Abstract: In a semiconductor apparatus in which plural semiconductor elements are stacked, metal wires whose one ends are connected to electrode terminals of the semiconductor elements are extended to the side surfaces of the semiconductor elements in an abutment state and the metal wires extended to the side surfaces of the semiconductor elements are bonded to a side surface wiring formed on side surfaces of the semiconductor elements by a conductive paste containing conductive particles.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 22, 2009
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Shigeru MIZUNO, Takashi KURIHARA, Akinori SHIRAISHI, Kei MURAYAMA, Mitsutoshi HIGASHI
  • Publication number: 20090001571
    Abstract: A method of manufacturing a semiconductor device in which a semiconductor element 10 is mounted on a substrate 20 through a flip-chip connection, includes the steps of cladding gallium as a bonding material 30 to a connecting pad 22 formed on a surface of the substrate 20, diffusing copper from the connecting pad 22 formed of the copper into the bonding material 30 through heating under vacuum, thereby bringing a state of a solid solution of the gallium and the copper, and aligning a connecting bump 12 formed on the semiconductor element 10 with the connecting pad 22 and bonding the connecting bump 12 to the connecting pad 22 through the bonding material 30 in a state of a solid solution under heating.
    Type: Application
    Filed: June 25, 2008
    Publication date: January 1, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Shigeru Mizuno, Takashi Kurihara