Abstract: The present disclosure relates to a solid-state image sensor, an electronic apparatus and an imaging method by which specific processing other than normal processing can be sped up with reduced power consumption. The solid-state image sensor includes a pixel outputting a pixel signal used to construct an image and a logic circuit driving the pixel, and is configured of a stacked structure in which a first semiconductor substrate including a plurality of the pixels and a second semiconductor substrate including the logic circuit are joined together. In addition, among the plurality of pixels, a specific pixel is connected to the logic circuit independently of a normal pixel, the specific pixel being the pixel that outputs the pixel signal used in the specific processing other than imaging processing in which the image is imaged. The present technology can be applied to a stacked solid-state image sensor, for example.

Abstract: The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.

Abstract: This device comprises: a casing with an upper surface including a sample-dripping portion receiving a liquid sample containing nucleic acid and being dripped from a nozzle; a reaction tube: outwardly projecting from an end of the casing; including a storage space therein; and being formed so as to be installed within a measurement apparatus; a filter carrying the nucleic acid contained in the liquid sample; a filter-supporting body stored within the casing to support the filter in a manner such that the filter is capable of taking: a contacting position wherein the filter contacts with the liquid sample right below the sample-dripping portion; and a reaction position wherein the filter is positioned within the storage space of the reaction tube; and absorbing material capable of taking: a press-attaching position wherein the absorbing material is press-attached to the filter in the contacting position so that the filter absorbs the liquid sample contacting therewith; and a separating position wherein the abso

Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.

Abstract: The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.

Abstract: The present invention proposes a semiconductor device, its manufacturing method and to an electronic apparatus thereof equipped with the semiconductor device where it becomes possible to make a CMOS type solid-state imaging device, an imager area formed with a MOS transistor of an LDD structure without having a metal silicide layer of a refractory metal, an area of DRAM cells and the like into a single semiconductor chip. According to the present invention, a semiconductor device is constituted such that an insulating film having a plurality of layers is used, sidewalls at the gate electrodes are formed by etchingback the insulating film of the plurality of layers or a single layer film in the region where metal silicide layers are formed and in the region where the metal silicide layers are not formed, sidewalls composed of an upper layer insulating film is formed on a lower layer insulating film whose surface is coated or the insulating film of the plurality of layers remain unchanged.

Abstract: The present invention provides a method capable of realizing pretreatment process of genetic screening according to a POCT mode. The method includes: making a sample, extraction liquid for extracting nucleic-acid contained in the sample, silica particles, and a filtering material contact with each other; making the filtering material carry composite material of the nucleic-acid and the silica particles thereon; and then delivering the filtering material to a nucleic-acid-amplifying process by means of reaction solution for amplifying nucleic-acid, wherein particle diameters of the silica particles and concentration of the silica particles in the reaction solution for amplifying nucleic-acid are set up within a predetermined range.

Abstract: The present disclosure relates to a solid-state image sensor, an electronic apparatus and an imaging method by which specific processing other than normal processing can be sped up with reduced power consumption. The solid-state image sensor includes a pixel outputting a pixel signal used to construct an image and a logic circuit driving the pixel, and is configured of a stacked structure in which a first semiconductor substrate including a plurality of the pixels and a second semiconductor substrate including the logic circuit are joined together. In addition, among the plurality of pixels, a specific pixel is connected to the logic circuit independently of a normal pixel, the specific pixel being the pixel that outputs the pixel signal used in the specific processing other than imaging processing in which the image is imaged. The present technology can be applied to a stacked solid-state image sensor, for example.

Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided.

Abstract: Solid-state imaging devices, methods of producing a solid-state imaging device, and electronic apparatuses are provided. More particularly, a solid-state image device includes a silicon substrate, and at least a first photodiode formed in the silicon substrate. The device also includes an epitaxial layer with a first surface adjacent a surface of the silicon substrate, and a transfer transistor with a gate electrode that extends from the at least a first photodiode to a second surface of the epitaxial layer opposite the first surface. In further embodiments, a solid-state imaging device with a plurality of pixels formed in a second semiconductor substrate wherein the pixels are symmetrical with respect to a center point is provided.

Abstract: The present disclosure relates to a solid-state image sensor, an electronic apparatus and an imaging method by which specific processing other than normal processing can be sped up with reduced power consumption. The solid-state image sensor includes a pixel outputting a pixel signal used to construct an image and a logic circuit driving the pixel, and is configured of a stacked structure in which a first semiconductor substrate including a plurality of the pixels and a second semiconductor substrate including the logic circuit are joined together. In addition, among the plurality of pixels, a specific pixel is connected to the logic circuit independently of a normal pixel, the specific pixel being the pixel that outputs the pixel signal used in the specific processing other than imaging processing in which the image is imaged. The present technology can be applied to a stacked solid-state image sensor, for example.

Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.

Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.

Abstract: The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.

Abstract: A robot control device drives a J1 shaft, which is a turning shaft for turning a structure at an installation bed, to an angle at a target position of the J1 shaft and drives a J4 shaft for turning a structure such that the central axes of a J2 shaft, a J3 shaft, and a J5 shaft, which are bending/stretching shafts for bending or stretching the structure, are parallel to one another; then, drives the J2 shaft, the J3 shaft, and the J5 shaft to angles J2e, J3e, and J5e at target positions of the respective shafts without driving the J4 shaft; and drives the J4 shaft not reaching an angle at a target position to an angle J4e at the target position.

Abstract: The objective of the present invention is to provide a new medicinal use of clarithromycin. The present invention is a therapeutic agent or a preventive agent for meibomian gland dysfunction or meibomian gland blockage and comprises clarithromycin as an active ingredient. The dosage form is preferably an eye drop or eye ointment.

Abstract: Provided is a kit for detecting multiple target nucleic acids capable of simultaneously amplifying and detecting multiple genes by means of one reaction vessel containing one kind of reaction solution and one kind of labels. Solution may contain first target nucleic acid (10) and second target nucleic acid (20) each of which dissociates at denaturation temperature T0.

Abstract: The present invention proposes a semiconductor device, its manufacturing method and to an electronic apparatus thereof equipped with the semiconductor device where it becomes possible to make a CMOS type solid-state imaging device, an imager area formed with a MOS transistor of an LDD structure without having a metal silicide layer of a refractory metal, an area of DRAM cells and the like into a single semiconductor chip. According to the present invention, a semiconductor device is constituted such that an insulating film having a plurality of layers is used, sidewalls at the gate electrodes are formed by etchingback the insulating film of the plurality of layers or a single layer film in the region where metal silicide layers are formed and in the region where the metal silicide layers are not formed, sidewalls composed of an upper layer insulating film is formed on a lower layer insulating film whose surface is coated or the insulating film of the plurality of layers remain unchanged.

Abstract: The present invention provides a method capable of realizing pretreatment process of genetic screening according to a POCT mode. The method includes: making a sample, extraction liquid for extracting nucleic-acid contained in the sample, silica particles, and a filtering material contact with each other; making the filtering material carry composite material of the nucleic-acid and the silica particles thereon; and then delivering the filtering material to a nucleic-acid-amplifying process by means of reaction solution for amplifying nucleic-acid, wherein particle diameters of the silica particles and concentration of the silica particles in the reaction solution for amplifying nucleic-acid are set up within a predetermined range.

Abstract: The present invention proposes a semiconductor device, its manufacturing method and to an electronic apparatus thereof equipped with the semiconductor device where it becomes possible to make a CMOS type solid-state imaging device, an imager area formed with a MOS transistor of an LDD structure without having a metal silicide layer of a refractory metal, an area of DRAM cells and the like into a single semiconductor chip. According to the present invention, a semiconductor device is constituted such that an insulating film having a plurality of layers is used, sidewalls at the gate electrodes are formed by etchingback the insulating film of the plurality of layers or a single layer film in the region where metal silicide layers are formed and in the region where the metal silicide layers are not formed, sidewalls composed of an upper layer insulating film is formed on a lower layer insulating film whose surface is coated or the insulating film of the plurality of layers remain unchanged.