Patents by Inventor Takashi Takemoto

Takashi Takemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200019885
    Abstract: Provided is a more efficient method as a method of parameter adjustment of a graph embedded in an annealing machine. An information processing apparatus including an annealing calculation circuit including a plurality of spin units, which obtains a solution using an Ising model, is also provided. In the apparatus, each of the plurality of spin units includes a first memory cell that stores a value of the spin of the Ising model, a second memory cell that stores an interaction coefficient with an adjacent spin that interacts with the spins, a third memory cell that stores an external magnetic field coefficient of the spin, and an operational circuit that performs an operation of determining a next value of the spin based on a value of the adjacent spin, the interaction coefficient, and the external magnetic field coefficient.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 16, 2020
    Inventors: Takashi TAKEMOTO, Normann MERTIG, Masato HAYASHI
  • Publication number: 20190372159
    Abstract: A method for producing a lithium solid state battery having a solid electrolyte membrane with high Li ion conductivity, in which firm interface bonding is formed on both sides of the membrane, comprising steps of: a membrane-forming step of forming CSE1 not containing a binder, composed of a sulfide solid electrolyte material, on a cathode active material layer by an AD method and ASE1 not containing a binder, composed of a sulfide solid electrolyte material, on an anode active material layer by an AD method, and a pressing step of forming SE1 with the CSE1 and the ASE1 integrated by opposing and pressing the CSE1 and the ASE1, wherein the SE1 such that an interface between the CSE1 and the ASE1 disappeared is formed by improving denseness of the CSE1 and the ASE1 in the pressing step.
    Type: Application
    Filed: August 9, 2019
    Publication date: December 5, 2019
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Muneyasu SUZUKI, Jun AKEDO, Takashi TAKEMOTO
  • Patent number: 10158143
    Abstract: A method for producing a lithium solid state battery having a solid electrolyte membrane with high Li ion conductivity, in which firm interface bonding is formed on both sides of the membrane, comprising steps of: a membrane-forming step of forming CSE1 not containing a binder, composed of a sulfide solid electrolyte material, on a cathode active material layer by an AD method and ASE1 not containing a binder, composed of a sulfide solid electrolyte material, on an anode active material layer by an AD method, and a pressing step of forming SE1 with the CSE1 and the ASE1 integrated by opposing and pressing the CSE1 and the ASE1, wherein the SE1 such that an interface between the CSE1 and the ASE1 disappeared is formed by improving denseness of the CSE1 and the ASE1 in the pressing step.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: December 18, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Muneyasu Suzuki, Jun Akedo, Takashi Takemoto
  • Publication number: 20180090785
    Abstract: A method for producing a lithium solid state battery having a solid electrolyte membrane with high Li ion conductivity, in which firm interface bonding is formed on both sides of the membrane, comprising steps of: a membrane-forming step of forming CSE1 not containing a binder, composed of a sulfide solid electrolyte material, on a cathode active material layer by an AD method and ASE1 not containing a binder, composed of a sulfide solid electrolyte material, on an anode active material layer by an AD method, and a pressing step of forming SE1 with the CSE1 and the ASE1 integrated by opposing and pressing the CSE1 and the ASE1, wherein the SE1 such that an interface between the CSE1 and the ASE1 disappeared is formed by improving denseness of the CSE1 and the ASE1 in the pressing step.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 29, 2018
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Muneyasu SUZUKI, Jun AKEDO, Takashi TAKEMOTO
  • Patent number: 9866185
    Abstract: The high-speed and high-quality reception operation of a transimpedance amplifier of an optical communication module and a router including the same can be achieved. A preamplifier performs current/voltage conversion with respect to intersymbol interference due to bandwidth shortage of a laser diode. A threshold control circuit which generates positive and negative threshold voltages with respect to a center potential of an output signal, latch circuits, and a selector circuit are provided to the output of the preamplifier. An NRZ signal is received as a duobinary signal based on the sign determination result of the previous bit. The determination error rate of the latch circuits can thus be improved.
    Type: Grant
    Filed: January 17, 2015
    Date of Patent: January 9, 2018
    Assignee: HITACHI, LTD.
    Inventors: Takashi Takemoto, Hiroki Yamashita
  • Publication number: 20170207482
    Abstract: Provided is a method for manufacturing an all-solid-state battery with which an all-solid-state battery of high performance may be easily manufactured. The method includes forming a first active material layer on each of a right face and a reverse face of a first current collector, forming a solid electrolyte layer on each first active material layer formed in the forming, arranging a second active material layer arranged on a base material, onto each solid electrolyte layer formed in the forming, in a manner that the solid electrolyte layer and the second active material layer have contact with each other, forming a stack by removing each base material having contact with the second active material layer, carrying out a roll press on the stack, and arranging a second current collector on each second active material layer of the stack on which the roll press is carried out.
    Type: Application
    Filed: January 3, 2017
    Publication date: July 20, 2017
    Inventors: Seiji Tomura, Takashi Takemoto, Tomoya Suzuki, Kengo Haga
  • Patent number: 9685977
    Abstract: A data compressing apparatus includes a polygonal line approximating circuit receiving first time series and outputs second time series by performing a polygonal line approximation process on the first time series. The polygonal line approximating circuit includes a first multiplier and a second multiplier performing multiplication having a first value calculated based on a difference between a time component of first data and a time component of second data in the time series data as input, and a third multiplier and a fourth multiplier performing multiplication having a second value calculated based on a difference between a sensor component of the first data and a sensor component of the second data as input.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Takemoto
  • Publication number: 20160141713
    Abstract: A method for producing a lithium solid state battery having a solid electrolyte membrane with high Li ion conductivity, in which firm interface bonding is formed on both sides of the membrane, comprising steps of: a membrane-forming step of forming CSE1 not containing a binder, composed of a sulfide solid electrolyte material, on a cathode active material layer by an AD method and ASE1 not containing a binder, composed of a sulfide solid electrolyte material, on an anode active material layer by an AD method, and a pressing step of forming SE1 with the CSE1 and the ASE1 integrated by opposing and pressing the CSE1 and the ASE1, wherein the SE1 such that an interface between the CSE1 and the ASE1 disappeared is formed by improving denseness of the CSE1 and the ASE1 in the pressing step.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 19, 2016
    Inventors: Muneyasu SUZUKI, Jun AKEDO, Takashi TAKEMOTO
  • Publication number: 20150222236
    Abstract: The high-speed and high-quality reception operation of a transimpedance amplifier of an optical communication module and a router including the same can be achieved. A preamplifier performs current/voltage conversion with respect to intersymbol interference due to bandwidth shortage of a laser diode. A threshold control circuit which generates positive and negative threshold voltages with respect to a center potential of an output signal, latch circuits, and a selector circuit are provided to the output of the preamplifier. An NRZ signal is received as a duobinary signal based on the sign determination result of the previous bit. The determination error rate of the latch circuits can thus be improved.
    Type: Application
    Filed: January 17, 2015
    Publication date: August 6, 2015
    Inventors: Takashi Takemoto, Hiroki Yamashita
  • Patent number: 9054655
    Abstract: Provided is a transimpedance amplifier which can realize a high-speed and high-quality receiver operation in an optical communication module or a router device having the optical communication module. An offset voltage which is generated in a post amplifier for differentiating and amplifying a single-phase output signal from a pre-amplifier in accordance with single-phase differentiation and conversion is cancelled by detecting a threshold voltage from an output of the pre-amplifier or an output of the post amplifier by a threshold detection circuit and by shifting a level of the threshold voltage corresponding to an offset amount to be compensated.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: June 9, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Takemoto, Hiroki Yamashita
  • Patent number: 8993952
    Abstract: An optical module including a transimpedance amplifier capable of realizing a high-speed and high-quality receiving operation is provided. A transimpedance amplifier includes: a pre-amplifier using a single-end current signal as an input and converting the single-end current signal to a single-end voltage signal; an automatic decision threshold control detecting a center electric potential of the single-end voltage signal serving as an output of the pre-amplifier; a post-amplifier differentiating and amplifying the single-end voltage signal of the output of the pre-amplifier; and a power circuit supplying power to the pre-amplifier. Particularly, in accordance with an input voltage signal or an output voltage signal of the pre-amplifier, the power circuit outputs a varied current that flows to a supply terminal of the pre-amplifier and a varied current having a phase opposite to that of the varied current. Thus, the power supply current change is cancelled out.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: March 31, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Takemoto, Hiroki Yamashita, Shinji Tsuji
  • Patent number: 8744181
    Abstract: Image processing apparatus of the embodiments includes a storage which stores data on any of color and brightness of a pixel represented in a first floating-point format including a significand represented in an integer-bit length and an exponent represented in a non-integer-bit length; and an image processor which processes the data.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: June 3, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Takemoto
  • Publication number: 20130342275
    Abstract: Provided is a transimpedance amplifier which can realize a high-speed and high-quality receiver operation in an optical communication module or a router device having the optical communication module. An offset voltage which is generated in a post amplifier for differentiating and amplifying a single-phase output signal from a pre-amplifier in accordance with single-phase differentiation and conversion is cancelled by detecting a threshold voltage from an output of the pre-amplifier or an output of the post amplifier by a threshold detection circuit and by shifting a level of the threshold voltage corresponding to an offset amount to be compensated.
    Type: Application
    Filed: May 23, 2013
    Publication date: December 26, 2013
    Applicant: Hitachi, Ltd.
    Inventors: Takashi TAKEMOTO, Hiroki YAMASHITA
  • Patent number: 8525708
    Abstract: A decoding device has a buffer configured in memory to store N code streams and N decoders connected in series. Each of N decoders decodes a corresponding code steam and sequentially generates partial symbols of M bit width each unit cycle. Among the N decoders, i (i>=2) stage decoders stores multiple probabilistic models in the memory. In each unit cycle, the decoder receives an input of i?1 partial symbols which contains partial symbols generated by the i?1 stage decoder in the former unit cycle, selects one probabilistic model among the multiple probabilistic models based on i?1 partial symbols which are entered previously, generates one partial symbol using previously selected probabilistic models, and outputs the previously generated one partial symbol along with previously entered i?1 partial symbols.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Sohei Kushida, Takashi Takemoto
  • Patent number: 8503888
    Abstract: An optical communication module and an optical communication device including the same are provided. For example, a first semiconductor chip on which a laser diode is formed and a second semiconductor chip on which a laser diode driver circuit, etc. for subjecting the laser diode to drive by current are formed are mounted on a package printed circuit board to be close to each other. Temperature detecting means is further formed on the second semiconductor chip (laser diode driver circuit, etc.). The temperature detecting means detects a temperature variation ?T of the first semiconductor chip (laser diode) transmitted via a wiring in the package printed circuit board and controls the magnitude of the driving current of the laser diode driver circuit based on a detection result.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: August 6, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Takemoto, Hiroki Yamashita, Shinji Tsuji
  • Publication number: 20130154857
    Abstract: A decoding device has a buffer configured in memory to store N code streams and N decoders connected in series. Each of N decoders decodes a corresponding code steam and sequentially generates partial symbols of M bit width each unit cycle. Among the N decoders, i (i>=2) stage decoders stores multiple probabilistic models in the memory. In each unit cycle, the decoder receives an input of i?1 partial symbols which contains partial symbols generated by the i?1 stage decoder in the former unit cycle, selects one probabilistic model among the multiple probabilistic models based on i?1 partial symbols which are entered previously, generates one partial symbol using previously selected probabilistic models, and outputs the previously generated one partial symbol along with previously entered i?1 partial symbols.
    Type: Application
    Filed: September 7, 2012
    Publication date: June 20, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sohei KUSHIDA, Takashi Takemoto
  • Patent number: 8463070
    Abstract: Provided are a rasterizer configured to convert a triangle TA formed with vertices VT to a group of pixels PX and then to divide the group of pixels PX into tiles TL; and a sorting buffer configured to store the group of pixels PX for each of the tiles TL.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Takemoto
  • Patent number: 8445832
    Abstract: An optical communication device which can be operated at high speed is provided. For example, the optical communication device includes: a pre-amplifier circuit PREAMP1 amplifying a current signal Iin from a photodiode PD, and converting an amplified signal into a voltage signal; and an operating-point controller circuit VTCTL1 controlling an operation of the PREAMP1. The PREAMP1 includes a negative feedback path formed by a feedback resistance Rf1, and includes: a level-shift circuit LS1 level-shifting in accordance with an operating-point control signal Vcon; and an amplifier circuit AMP1 connected to a subsequent stage of the LS1 and performing an amplifying operation with a high gain. The VTCTL1 includes a replica circuit configured by the same circuit and circuit parameter as those of the AMP1 and electrically connected between the input and the output, and generates the Vcon so that an output DC level of this replica circuit is matched with an input DC level of the AMP1.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: May 21, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Takemoto, Hiroki Yamashita, Tatsuya Saito
  • Patent number: 8358708
    Abstract: A low offset input circuit and a signal transmission system which can accommodate a high-speed interface and achieve reduction of an offset voltage are provided. An offset voltage compensating circuit block 103 having an input circuit block 108 including an input circuit 104 and an adder-subtractor circuit block 105, switches 108, 109, a detecting circuit block 106, and an adjusting and holding circuit block 107 is provided. To compensate for an offset voltage of the input circuit block 102, an offset voltage of the input circuit block 102 is detected at the detecting circuit block 106 by turning on the switches 108, 109, and the detected offset voltage is held in the adjusting and holding circuit block 107, and negative feedback of the held offset voltage to the adder-subtractor circuit block 105 is performed. Thereby, signals Vop, Von having compensated offset voltages are outputted from the input circuit block 102.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: January 22, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Takemoto, Hiroki Yamashita, Masayoshi Yagyu
  • Publication number: 20130016748
    Abstract: An optical module including a transimpedance amplifier capable of realizing a high-speed and high-quality receiving operation is provided. A transimpedance amplifier includes: a pre-amplifier using a single-end current signal as an input and converting the single-end current signal to a single-end voltage signal; an automatic decision threshold control detecting a center electric potential of the single-end voltage signal serving as an output of the pre-amplifier; a post-amplifier differentiating and amplifying the single-end voltage signal of the output of the pre-amplifier; and a power circuit supplying power to the pre-amplifier. Particularly, in accordance with an input voltage signal or an output voltage signal of the pre-amplifier, the power circuit outputs a varied current that flows to a supply terminal of the pre-amplifier and a varied current having a phase opposite to that of the varied current. Thus, the power supply current change is cancelled out.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 17, 2013
    Inventors: Takashi TAKEMOTO, Hiroki YAMASHITA, Shinji TSUJI