Abstract: A method of forming an integrated circuit includes forming at least one hard mask layer on a device layer of a silicon-on-Insulator (SOI) substrate. A patterned trench etch forms larger area and smaller area trenches through the hard mask layer, device layer and BOX layer. A dielectric liner is formed for lining the larger area and smaller area trenches. A sub-atmospheric pressure chemical vapor (SACVD) dielectric layer is deposited for filing the smaller area trenches and partially filling the larger area trenches. The larger area trenches are bottom etched through the SACVD layer to provide a through-substrate contact (TSC) to the handle portion. The SACVD layer is densified after bottom etching, the handle portion at a bottom of the larger area trenches is implanted to form a handle contact, and the larger area trenches are filled with an electrically conductive layer to form a top side ohmic contact.

Abstract: A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Abstract: A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Abstract: The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

Abstract: Methods for detecting a void in an element portion of a semiconductor device having an element portion and a void detection structure are disclosed. As a part of the method, an insulating film is formed on a substrate, a plurality of holes is formed in the insulating film, and a metal portion is formed on the insulating film to fill the plurality of holes. The metal portion is polished until the insulating film is exposed and a recessed portion is formed in the void detection structure. It is determined if a void exists in the element portion of the semiconductor device by determining whether or not a void is exposed at a surface of the recessed portion of the void detection structure.

Abstract: The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

Abstract: The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

Abstract: A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Abstract: A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Abstract: Methods for detecting a void in an element portion of a semiconductor device having an element portion and a void detection structure are disclosed. As a part of the method, an insulating film is formed on a substrate, a plurality of holes is formed in the insulating film, and a metal portion is formed on the insulating film to fill the plurality of holes. The metal portion is polished until the insulating film is exposed and a recessed portion is formed in the void detection structure. It is determined if a void exists in the element portion of the semiconductor device by determining whether or not a void is exposed at a surface of the recessed portion of the void detection structure.

Abstract: Methods for detecting a void in an element portion of a semiconductor device having an element portion and a void detection structure are disclosed. As a part of the method, an insulating film is formed on a substrate, a plurality of holes is formed in the insulating film, and a metal portion is formed on the insulating film to fill the plurality of holes. The metal portion is polished until the insulating film is exposed and a recessed portion is formed in the void detection structure. It is determined if a void exists in the element portion of the semiconductor device by determining whether or not a void is exposed at a surface of the recessed portion of the void detection structure.

Abstract: Devices and methods for plasma treated metal silicide layer formation are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a metal layer on a silicon substrate, exposing the metal layer to a plasma, and thermally treating the silicon substrate and the metal layer to form a metal silicide layer.

Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.

Abstract: Methods for detecting a void in an element portion of a semiconductor device having an element portion and a void detection structure are disclosed. As a part of the method, an insulating film is formed on a substrate, a plurality of holes is formed in the insulating film, and a metal portion is formed on the insulating film to fill the plurality of holes. The metal portion is polished until the insulating film is exposed and a recessed portion is formed in the void detection structure. It is determined if a void exists in the element portion of the semiconductor device by determining whether or not a void is exposed at a surface of the recessed portion of the void detection structure.

Abstract: Devices and methods for plasma treated metal silicide layer formation are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a metal layer on a silicon substrate, exposing the metal layer to a plasma, and thermally treating the silicon substrate and the metal layer to form a metal silicide layer.

Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.

Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.

Abstract: The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.

Abstract: A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Abstract: A semiconductor device includes a semiconductor substrate, an ONO film that is provided on the semiconductor substrate and has a contact hole, and an interlayer insulating film that is provided directly on the ONO film and contains phosphorus. The interlayer insulating film contains 4.5 wt % of phosphorus or more in an interface portion that interfaces with the ONO film. The interlayer insulating film comprises a first portion that contacts the ONO film, and a second portion provided on the first portion. The first portion has a phosphorus concentration more than that of the second portion.