Patents by Inventor Takayuki Enda

Takayuki Enda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060145242
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Application
    Filed: March 7, 2006
    Publication date: July 6, 2006
    Applicant: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Patent number: 7037780
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: May 2, 2006
    Assignee: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Publication number: 20050006672
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Application
    Filed: August 12, 2004
    Publication date: January 13, 2005
    Applicant: Fujitsu AMD Semiconductor Limited
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi
  • Patent number: 6794248
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: September 21, 2004
    Assignee: Fujitsu Amd Semiconductor Limited
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi
  • Publication number: 20040110390
    Abstract: A silicon nitride film for storing electric charge is formed on a semiconductor substrate while placing a tunnel oxide film in between, and the silicon nitride film is then subjected to hydrogen plasma treatment so as to effectively erase unnecessary charge stored therein during various process steps in fabrication of the semiconductor memory device, to thereby stabilize the threshold voltage (Vth) of the semiconductor memory device.
    Type: Application
    Filed: November 18, 2003
    Publication date: June 10, 2004
    Applicant: FASL LLC
    Inventors: Hideo Takagi, Takayuki Enda, Miyuki Umetsu, Tsukasa Takamatsu
  • Publication number: 20030162354
    Abstract: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in a charge storage part. An oxide coating film is formed on the surface of the metal interconnection at the bonding pad part, and ultraviolet rays are irradiated onto the oxide coating film for erasing of charges from the floating gate.
    Type: Application
    Filed: October 25, 2002
    Publication date: August 28, 2003
    Applicant: FUJITSU AMD SEMICONDUCTOR LIMITED
    Inventors: Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Takayuki Enda, Hideo Takagi
  • Patent number: 6007732
    Abstract: A pattern forming method having a step of forming an amorphous carbon film on a patterning layer formed on a substrate, a step of forming a photoresist film on the amorphous carbon film, a step of selectively exposing and developing the photoresist film to form a photoresist pattern, and a step of successively dry-etching the amorphous carbon film and the patterning layer by using the photoresist film as an etching mask. Desired optical constants of an amorphous carbon film formed by sputtering can be obtained by controlling a substrate temperature and other parameters.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: December 28, 1999
    Assignee: Fujitsu Limited
    Inventors: Koichi Hashimoto, Toshiyuki Ohtsuka, Fumihiko Shinpuku, Daisuke Matsunaga, Takayuki Enda
  • Patent number: 5656128
    Abstract: A pattern forming method having a step of forming an amorphous carbon film on a patterning layer formed on a substrate, a step of forming a photoresist film on the amorphous carbon film, a step of selectively exposing and developing the photoresist film to form a photoresist pattern, and a step of successively dry-etching the amorphous carbon film and the patterning layer by using the photoresist film as an etching mask. Desired optical constants of an amorphous carbon film formed by sputtering can be obtained by controlling a substrate temperature and other parameters.
    Type: Grant
    Filed: March 24, 1994
    Date of Patent: August 12, 1997
    Assignee: Fujitsu Limited
    Inventors: Koichi Hashimoto, Toshiyuki Ohtsuka, Fumihiko Shinpuku, Daisuke Matsunaga, Takayuki Enda