Abstract: On a recording medium serving as a verification object, a picture whose state changes in accordance with optical conditions is formed. A verification apparatus images a plurality of pictures of the recording medium while changing an optical relationship among a light source for illuminating the recording medium, a camera for imaging a picture of the recording medium, and the recording medium with a condition modifying unit. The verification apparatus displays the plurality of pictures of the recording medium imaged by the camera, on the display unit in a state in which the optical relationship has been changed. The verification apparatus determines imaging conditions for imaging a picture for verification on the basis of the optical relationship at the time of photographing selected pictures among the plurality of pictures displayed on the display unit.

Abstract: In relation to a superimposed image obtained by superimposing second image data on first image data in which respective pixels are arranged in a staggered pattern, an image forming apparatus discriminates a region where the second image data is superimposed from a region where the second image data is not superimposed. When forming an image in a region determined as the region where the second image data is not superimposed in the superimposed image, the printing mechanism is controlled based on a first control pattern. When forming an image in a region determined as the region where the second image data is superimposed in the superimposed image, the printing mechanism is controlled based on a second control pattern different from the first control pattern.

Abstract: Two identical images are printed, side by side, on an intermediate transfer-recording medium, by using image data that represents an image to be printed on a brochure. The two images thus printed are compared, thereby to determine whether they have defects. One of the images, which is found to have no defects, is transferred from the intermediate transfer-recording medium to the brochure, which is a final transfer-recording medium.

Abstract: In a personal authentication medium issuing apparatus, a main image information is input and whether a personal authentication medium on which synthesized image information having sub-information embedded in the main image information is checked or not is determined based on the state of the input main image information. Further, synthesized image information having sub-information embedded in an invisible state in the main image information which is set in a visible state is formed, a personal authentication medium is formed by printing the synthesized image information on a recording medium and the thus formed personal authentication media are sorted into personal authentication media determined to be completely formed and personal authentication media determined to require a checking process.

Abstract: An image processing apparatus which forms an image on a recording medium by alternately driving a plurality of heaters linearly arranged in a main scanning direction alternately replaces even-numbered pixels and odd-numbered pixels of first image data in the main scanning direction by pixels of data which is not recorded for respective recording lines in a sub-scanning direction, rotates second image data different from the first image data by a preset angle and alternately converts pixels of the second image data into pixels of image data arranged in odd-numbered and even-numbered locations in the main scanning direction for respective lines in the sub-scanning direction, and superimposes the second image data processed on the first image data processed.

Abstract: Independent power supply systems are provided for a peripheral circuit other than a column decoder, an array-relevant circuit, and a column decoder respectively, so that a peripheral power supply voltage, an array power supply voltage, and a column decoder power supply voltage generated independently of each other are supplied to the peripheral circuit, the array-relevant circuit, and the column decoder as an operating power supply voltage, respectively. Preferably, the column decoder power supply voltage during normal operation is set as an intermediate voltage between the peripheral power supply voltage and the array power supply voltage. Thus, an array configuration suitable for driving a transistor with a low voltage in order to achieve lower power consumption can be obtained.

Abstract: In a semiconductor memory unit to which a plurality of different functions can be imparted by merely changing a portion of its production process, the improvement comprises: a plurality of data buses which include first data buses for use only in one of the functions and the remaining data buses for use in the one and the remainder of the functions; wherein when the semiconductor memory unit performs the remainder of the functions, the first data buses are utilized for the semiconductor memory unit.

Abstract: A semiconductor chip is provided with a phase comparison circuit (1), in addition to an integrated circuit implementing a normal operation. The phase comparison circuit (1) compares phases between an internal signal (A) of the integrated circuit and an external signal and outputs a monitor signal (MONSIG) expressing the result of this comparison outward from the semiconductor chip. Thus, the phase of the internal signal (A) of the integrated circuit can be directly detected.

Abstract: A multi-gradation image such as a face image of a person in which sub-information is to be embedded is subjected to a preprocess by a preprocessing section based on a relationship between certain image data and read image data of a printed matter on which the certain image data is printed, sub-information is embedded into the multi-gradation image subjected to the preprocess by the preprocessing section by use of an digital watermark embedding section in an invisible state to the human eye, and the multi-gradation image having the sub-information embedded therein by the digital watermark embedding section is subjected to a post-process corresponding to the preprocess performed by the preprocessing section by use of a post-processing section.

Abstract: By switching a mode signal, capability of a drive circuit in a latch circuit can be improved than in a normal mode. Accordingly, even if a small leakage occurs in a blown portion of a fuse element, blow is correctly identified. In this manner, by improving drivability of the latch circuit, incorrect determination of fuse blow state can be avoided. Thus, a semiconductor device unlikely to make incorrect determination of fuse blow state can be provided.

Abstract: A trigger producing circuit provides a trigger signal. A delay circuit receives the trigger signal, and provides a delay signal produced by delaying the trigger signal. A clock counter receives clocks, counts the received clocks for a period from reception of the trigger signal to reception of the delay signal, and provides a result of the counting. A determining circuit stores a relationship between the number of clocks and a latency, and determines the latency corresponding to the result of counting provided from the clock counter. A latency register holds the determined latency. A WAIT control circuit externally provides a WAIT signal based on the latency held in the latency register.

Abstract: Sub-information is embedded in main image information having undergone thinning-out processing and rotation processing. The resultant composite image information in which the sub-information is embedded is recorded on a recording medium after performing transformation processing of rotation reverse to the rotation processing.

Abstract: Sub-information is embedded in main image information having undergone thinning-out processing and rotation processing. The resultant composite image information in which the sub-information is embedded is recorded on a recording medium after performing transformation processing of rotation reverse to the rotation processing.

Abstract: In a personal authentication medium issuing apparatus, a main image information is input and whether a personal authentication medium on which synthesized image information having sub-information embedded in the main image information is checked or not is determined based on the state of the input main image information. Further, synthesized image information having sub-information embedded in an invisible state in the main image information which is set in a visible state is formed, a personal authentication medium is formed by printing the synthesized image information on a recording medium and the thus formed personal authentication media are sorted into personal authentication media determined to be completely formed and personal authentication media determined to require a checking process.

Abstract: Independent power supply systems are provided for a peripheral circuit other than a column decoder, an array-relevant circuit, and a column decoder respectively, so that a peripheral power supply voltage, an array power supply voltage, and a column decoder power supply voltage generated independently of each other are supplied to the peripheral circuit, the array-relevant circuit, and the column decoder as an operating power supply voltage, respectively. Preferably, the column decoder power supply voltage during normal operation is set as an intermediate voltage between the peripheral power supply voltage and the array power supply voltage. Thus, an array configuration suitable for driving a transistor with a low voltage in order to achieve lower power consumption can be obtained.

Abstract: A semiconductor chip is provided with a phase comparison circuit (1), in addition to an integrated circuit implementing a normal operation. The phase comparison circuit (1) compares phases between an internal signal (A) of the integrated circuit and an external signal and outputs a monitor signal (MONSIG) expressing the result of this comparison outward from the semiconductor chip. Thus, the phase of the internal signal (A) of the integrated circuit can be directly detected.

Abstract: A semiconductor chip is provided with a phase comparison circuit (1), in addition to an integrated circuit implementing a normal operation. The phase comparison circuit (1) compares phases between an internal signal (A) of the integrated circuit and an external signal and outputs a monitor signal (MONSIG) expressing the result of this comparison outward from the semiconductor chip. Thus, the phase of the internal signal (A) of the integrated circuit can be directly detected.

Abstract: By switching a mode signal, capability of a drive circuit in a latch circuit can be improved than in a normal mode. Accordingly, even if a small leakage occurs in a blown portion of a fuse element, blow is correctly identified. In this manner, by improving drivability of the latch circuit, incorrect determination of fuse blow state can be avoided. Thus, a semiconductor device unlikely to make incorrect determination of fuse blow state can be provided.

Abstract: A clock signal, which is generated by utilizing a delay circuit having a delay time depending on the operation frequency of an internal clock signal, is applied to a first circuit for activation thereof, and a clock signal, which has a fixed delay not dependent on the clock frequency and is adjusted in phase with respect to an external clock signal, is applied to a second circuit receiving the output signal of the first circuit for operation thereof. Thus, the operation timing of the second circuit can be set to be as late as possible. Consequently, it is possible to mitigate the operation conditions of the first circuit, to achieve a high speed data transfer. Even in the high speed operation, internal data can be reliably taken in, and transferred accurately.

Abstract: Sub-information is embedded in main image information having undergone thinning-out processing and rotation processing. The resultant composite image information in which the sub-information is embedded is recorded on a recording medium after performing transformation processing of rotation reverse to the rotation processing.