Patents by Inventor Taketomi Asami
Taketomi Asami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6794229Abstract: The present invention is provided in order to remove contamination due to contaminant impurities of the interfaces of each film which forms a TFT, which is the major factor that reduces the reliability of TFTs. By connecting a washing chamber and a film formation chamber, film formation can be carried out without exposing TFTs to the air during the time from washing step to the film formation step and it becomes possible to maintain the cleanliness of the interfaces of each film which form the TFT.Type: GrantFiled: April 26, 2001Date of Patent: September 21, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Shunpei Yamazaki
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Patent number: 6787807Abstract: The orientation of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film is improved and a TFT formed from this crystalline semiconductor film is provided. In a semiconductor device whose TFT is formed from a semiconductor layer mainly containing silicon, the semiconductor layer has a channel formation region and an impurity region doped with an impurity of one type of conductivity.Type: GrantFiled: June 18, 2001Date of Patent: September 7, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Mitsuki, Kenji Kasahara, Taketomi Asami, Tamae Takano, Takeshi Shichi, Chiho Kokubo
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Publication number: 20040169177Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.Type: ApplicationFiled: March 4, 2004Publication date: September 2, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd. a Japan corporationInventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi
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Publication number: 20040157564Abstract: In the case where a material containing an alkaline metal or an alkaline-earth metal in a cathode, an anode, a buffer layer, or an organic compound layer is used, there is a fear of the diffusion of an impurity ion (representatively, alkaline metal ion or alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT.Type: ApplicationFiled: February 2, 2004Publication date: August 12, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
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Publication number: 20040108576Abstract: The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % but not larger than 10 atomic % while adding a metal element thereto, wherein not smaller than 20% of the lattice plane {101} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, not larger than 3% of the lattice plane {001} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, and not larger than 5% of the lattice plane {111} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film as detected by the electron backscatter diffraction pattern method.Type: ApplicationFiled: December 5, 2003Publication date: June 10, 2004Applicant: Semiconductor Energy Laboratory, Co., Ltd., a Japan corporationInventors: Shunpei Yamazaki, Toru Mitsuki, Kenji Kasahara, Taketomi Asami, Tamae Takano, Takeshi Shichi, Chiho Kokubo, Yasuyuki Arai
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Patent number: 6743700Abstract: A semiconductor film having a crystalline structure is formed by using a metal element that assists the crystallization of the semiconductor film, and the metal element remaining in the film is effectively removed to decrease the dispersion among the elements. The semiconductor film or, typically, an amorphous silicon film having an amorphous structure is obtained based on the plasma CVD method as a step of forming a gettering site, by using a monosilane, a rare gas element and hydrogen as starting gases, the film containing the rare gas element at a high concentration or, concretely, at a concentration of 1×1020/cm3 to 1×1021/cm3 and containing fluorine at a concentration of 1×1015/cm3 to 1×1017/cm3.Type: GrantFiled: May 29, 2002Date of Patent: June 1, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Noriyoshi Suzuki, Hideto Ohnuma, Masato Yonezawa
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Publication number: 20040079952Abstract: In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having tensile stress on a substrate, tensile stress is given to the first insulating layer formed to be in close contact with a surface of the semiconductor layer at a substrate side, and compressive stress is given to the second insulating layer formed to be in close contact with a surface of the semiconductor layer at a side opposite to the substrate side.Type: ApplicationFiled: October 14, 2003Publication date: April 29, 2004Applicant: Semiconductor Energy LaboratoryInventors: Shunpei Yamazaki, Taketomi Asami, Toru Takayama, Ritsuko Kawasaki, Hiroki Adachi, Naoya Sakamoto, Masahiko Hayakawa, Hiroshi Shibata, Yasuyuki Arai
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Patent number: 6717181Abstract: In the case where a material containing an alkaline metal or an alkaline-earth metal in a cathode, an anode, a buffer layer, or an organic compound layer is used, there is a fear of the diffusion of an impurity ion (representatively, alkaline metal ion or alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. As the insulating films 117, 317 and 417 provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion but also aggressively absorbing an impurity ion, for example, a silicon nitride film containing a large amount of fluorine, a silicon oxynitride film containing a large amount of fluorine or an organic resin film containing a particle having an antimony (Sb) compound, a tin (Sn) compound, or an indium (In) compound is used.Type: GrantFiled: May 20, 2002Date of Patent: April 6, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
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Patent number: 6703265Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.Type: GrantFiled: August 1, 2001Date of Patent: March 9, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi
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Patent number: 6690068Abstract: The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.Type: GrantFiled: June 6, 2001Date of Patent: February 10, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Mitsuki, Kenji Kasahara, Taketomi Asami, Tamae Takano, Takeshi Shichi, Chiho Kokubo, Yasuyuki Arai
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Publication number: 20040007748Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.Type: ApplicationFiled: January 8, 2003Publication date: January 15, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
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Patent number: 6645826Abstract: In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having tensile stress on a substrate, tensile stress is given to the first insulating layer formed to be in close contact with a surface of the semiconductor layer at a substrate side, and compressive stress is given to the second insulating layer formed to be in close contact with a surface of the semiconductor layer at a side opposite to the substrate side.Type: GrantFiled: March 7, 2002Date of Patent: November 11, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Toru Takayama, Ritsuko Kawasaki, Hiroki Adachi, Naoya Sakamoto, Masahiko Hayakawa, Hiroshi Shibata, Yasuyuki Arai
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Patent number: 6627486Abstract: A method for manufacturing a semiconductor, comprising crystallizing an amorphous silicon film formed on a substrate by employing lateral growth method using a catalyst element which accelerates the crystallization, wherein the duration of annealing accounts for 90% or more but less than 100% of the time for crystallization of the amorphous silicon film under the condition that no catalyst element is used.Type: GrantFiled: October 10, 2000Date of Patent: September 30, 2003Assignee: Semiconductor Energy Laboratory Co. Ltd.Inventors: Hisashi Ohtani, Tamae Takano, Taketomi Asami, Etsuko Fujimoto
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Publication number: 20030162334Abstract: Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.Type: ApplicationFiled: December 20, 2002Publication date: August 28, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Mitsuhiro Ichijo, Toru Mitsuki, Yoko Kanakubo
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Publication number: 20030157754Abstract: A hydrogenation method that utilizes plasma directly exposes a crystalline semiconductor film to the plasma, and therefore involves the problem that the crystalline semiconductor film is damaged by the ions generated simultaneously in the plasma. If a substrate is heated to 400° C. or above to recover this damage, hydrogen is re-emitted from the crystalline semiconductor film.Type: ApplicationFiled: November 5, 2002Publication date: August 21, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Hidehito Kitakado, Yasuyuki Arai
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Patent number: 6573195Abstract: In fabricating a semiconductor device, a hydrogen-containing first insulating film is formed over a semiconductor layer, a gate insulating film and a gate electrode, and a first heat-treatment in a hydrogen atmosphere is performed. A second insulating film can be formed on the first insulating film, and a second heat-treatment in a hydrogen atmosphere performed. A hydrogen-containing third insulating film can be formed on the second insulating film, and a third heat-treatment in an atmosphere containing hydrogen or nitrogen performed. By these methods, damages to a semiconductor layer caused by hydrogenation can be avoided.Type: GrantFiled: January 24, 2000Date of Patent: June 3, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Hidehito Kitakado, Yasuyuki Arai
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Publication number: 20030100150Abstract: Channel doping is an effective method for controlling Vth, but if Vth shifts to the order of −4 to −3 V when forming circuits such as a CMOS circuit formed from both an n-channel TFT and a P-channel TFT on the same substrate, then it is difficult to control the Vth of both TFTs with one channel dope. In order to solve the above problem, the present invention forms a blocking layer on the back channel side, which is a laminate of a silicon oxynitride film (A) manufactured from SiH4, NH3, and N2O, and a silicon oxynitride film (B) manufactured from SiH4 and N2O. By making this silicon oxynitride film laminate structure, contamination by alkaline metallic elements from the substrate can be prevented, and influence by stresses, caused by internal stress, imparted to the TFT can be relieved.Type: ApplicationFiled: September 30, 2002Publication date: May 29, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidehito Kitakado, Masahiko Hayakawa, Shunpei Yamazaki, Taketomi Asami
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Publication number: 20030082859Abstract: A technique of reducing fluctuation between elements is provided in which a semiconductor film having a crystal structure is obtained by using a metal element that accelerates crystallization of a semiconductor film and then the metal element remaining in the film is removed effectively. A barrier layer is formed on a semiconductor film having a crystal structure by plasma CVD from monosilane and nitrous oxide as material gas. In a step of forming a gettering site, a semiconductor film having an amorphous structure and containing a high concentration of noble gas element, specifically, 1×1020 to 1×1021 /cm3, is formed by plasma CVD. The film is typically an amorphous silicon film. Then gettering is conducted.Type: ApplicationFiled: September 24, 2002Publication date: May 1, 2003Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki
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Patent number: 6521912Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.Type: GrantFiled: November 2, 2000Date of Patent: February 18, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
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Patent number: 6506636Abstract: Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.Type: GrantFiled: May 9, 2001Date of Patent: January 14, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Mitsuhiro Ichijo, Toru Mitsuki, Yoko Kanakubo