Patents by Inventor Tamotsu Owada

Tamotsu Owada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110244677
    Abstract: A method of manufacturing a semiconductor device includes: forming a first conductive film on a substrate; forming an insulating film to cover the conductive film; etching the insulating film to form an opening portion to expose at least a portion of the first conductive film in the insulating film; irradiating the opening portion with ultraviolet rays in a reduction gas atmosphere; forming a barrier metal film in the opening portion; and forming a second conductive film on the barrier metal film.
    Type: Application
    Filed: March 28, 2011
    Publication date: October 6, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Tamotsu Owada
  • Patent number: 8026164
    Abstract: A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron beam to a surface of the organic insulating film, forming recesses in the organic insulating film, forming a conductive material over the organic insulating film and in the recesses, and removing the conductive material on the organic insulating film by a polishing to expose the surface of the organic insulating film and to leave the conductive material buried in recesses of the organic insulating film.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: September 27, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Satoshi Takesako, Shinichi Akiyama, Tamotsu Owada
  • Publication number: 20110183515
    Abstract: A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.
    Type: Application
    Filed: March 10, 2011
    Publication date: July 28, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hiroshi Kudo, Nobuyuki Ohtsuka, Masaki Haneda, Tamotsu Owada
  • Patent number: 7928476
    Abstract: A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: April 19, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hiroshi Kudo, Nobuyuki Ohtsuka, Masaki Haneda, Tamotsu Owada
  • Patent number: 7763509
    Abstract: A method of manufacturing a semiconductor device, in which a stress film having a large stress can be formed with high accuracy over a transistor. The method comprises the steps of: depositing a tensile stress film over the whole surface of a substrate having formed thereon an n-MOSFET; removing by etching the deposited stress film while leaving it on the n-MOSFET; and performing UV irradiation to the remaining stress film. By the UV irradiation, a tensile stress of the stress film is improved. Further, although the stress film is cured by the UV irradiation, occurrence of etching defects caused by the curing is prevented because the UV irradiation is performed after the etching. Thus, speeding-up and high quality of the n-MOSFET can be attained.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: July 27, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Sergey Pidin, Tamotsu Owada
  • Patent number: 7749897
    Abstract: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: July 6, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Ken Sugimoto, Yoshiyuki Ohkura, Hirofumi Watatani, Tamotsu Owada, Shunn-ichi Fukuyama
  • Publication number: 20100164119
    Abstract: A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron beam to a surface of the organic insulating film, forming recesses in the organic insulating film, forming a conductive material over the organic insulating film and in the recesses, and removing the conductive material on the organic insulating film by a polishing to expose the surface of the organic insulating film and to leave the conductive material buried in recesses of the organic insulating film.
    Type: Application
    Filed: October 21, 2009
    Publication date: July 1, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Satoshi Takesako, Shinichi Akiyama, Tamotsu Owada
  • Publication number: 20100012991
    Abstract: A method for fabricating a semiconductor device, comprising: forming n-channel field-effect transistors on a silicon substrate; forming a first insulating film covering the field-effect transistors; shrinking the first insulating film; forming a second insulating film over the first insulating film; and shrinking the second insulating film, wherein the forming an insulating film covering the field-effect transistors and the shrinking the insulating film are repeated a plurality of time.
    Type: Application
    Filed: September 28, 2009
    Publication date: January 21, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Tamotsu OWADA, Hirofumi Watatani
  • Patent number: 7642185
    Abstract: A first film made of silicon carbide is formed over a substrate. The surface of the first film is exposed to an oxidizing atmosphere to oxidize the surface layer of the first film. The surface of the first film is made in contact with chemical which makes the surface hydrophilic. On the hydrophilic surface of the first film, a second film is formed which is an insulating film made of a low dielectric constant insulating material having a relative dielectric constant of 2.7 or smaller or an insulating film made by a coating method. A sufficient adhesion property is obtained when a film made of low dielectric constant insulating material is formed on an insulating film made of silicon carbide having a small amount of oxygen contents.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: January 5, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tamotsu Owada, Hirofumi Watatani, Ken Sugimoto, Shun-ichi Fukuyama
  • Publication number: 20090278259
    Abstract: A semiconductor device includes an insulation film formed above a semiconductor substrate, a conductor containing Cu formed in the insulation film, and a layer film formed between the insulation film and the conductor and formed of a first metal film containing Ti and a second metal film different from the first metal film, a layer containing Ti and Si is formed on the surface of the conductor.
    Type: Application
    Filed: February 5, 2009
    Publication date: November 12, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Takahiro KOUNO, Shinichi AKIYAMA, Hirofumi WATATANI, Tamotsu OWADA
  • Patent number: 7579277
    Abstract: A semiconductor device in which the diffusion of copper from a wire is prevented and a method for fabricating such a semiconductor device. For example, a via groove and a wire groove are formed in a multilayer structure including a UDC diffusion barrier film, a porous silica film, a middle UDC stopper film, a porous silica film, a UDC diffusion barrier film, and the like, and the surfaces the UDC diffusion barrier film, the middle UDC stopper film, and the UDC diffusion barrier film that get exposed in the via groove and the wire groove are irradiated with hydrogen plasma, thereby making the surface of each exposed SiC film silicon-rich. After the plasma irradiation, a Ta film is formed in the via groove and the wire groove and copper is embedded in these grooves. By making the surface of each SiC film which is to touch the Ta film silicon-rich in advance, the crystal structure of the Ta film can be controlled so that copper cannot pierce through the Ta film. This prevents copper from diffusing from a wire.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: August 25, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tamotsu Owada, Hisaya Sakai, Shun-ichi Fukuyama
  • Publication number: 20090146309
    Abstract: A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.
    Type: Application
    Filed: November 20, 2008
    Publication date: June 11, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Hiroshi KUDO, Nobuyuki OHTSUKA, Masaki HANEDA, Tamotsu OWADA
  • Patent number: 7541296
    Abstract: Disclosed is a method for effectively forming a Low-k insulating film. The method comprises the steps of: spin-coating on an underlying layer a precursor solution formed by dispersing Low-k materials in a solvent to form a coating film, subjecting the coating film to a baking treatment under heating for about several minutes at a temperature near a boiling point of the solvent, forming, on the coating film after the baking treatment, an SiC barrier film using a CVD method, and subjecting the coating film to a hydrogen plasma treatment through the barrier film continuously using the same CVD apparatus as used in forming the barrier film without taking out the coating film from the CVD apparatus.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: June 2, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tamotsu Owada, Hirofumi Watatani, Yoshihiro Nakata, Shirou Ozaki, Shun-ichi Fukuyama
  • Publication number: 20090093130
    Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.
    Type: Application
    Filed: December 3, 2008
    Publication date: April 9, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Tamotsu Owada, Shun-ichi Fukuyama, Hirofumi Watatani, Kengo Inoue, Atsuo Shimizu
  • Patent number: 7485570
    Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: February 3, 2009
    Assignee: Fujitsu Limited
    Inventors: Tamotsu Owada, Shun-ichi Fukuyama, Hirofumi Watatani, Kengo Inoue, Atsuo Shimizu
  • Publication number: 20080305645
    Abstract: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.
    Type: Application
    Filed: July 18, 2008
    Publication date: December 11, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Ken Sugimoto, Yoshiyuki Ohkura, Hirofumi Watatani, Tamotsu Owada, Shunn-ichi Fukuyama
  • Publication number: 20080233734
    Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate, forming a trench in the first insulating film, forming a metal interconnect in the trench, exposing the surface of the metal interconnect to a silicon-containing gas, performing a plasma treatment of the surface of the metal interconnect after exposing to the silicon-containing gas, and forming a second insulating film over the metal interconnect.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 25, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Naoki OHARA, Hirofumi WATATANI, Tamotsu OWADA, Kenichi YANAI
  • Publication number: 20080124856
    Abstract: A method of manufacturing a semiconductor device, in which a stress film having a large stress can be formed with high accuracy over a transistor. The method comprises the steps of: depositing a tensile stress film over the whole surface of a substrate having formed thereon an n-MOSFET; removing by etching the deposited stress film while leaving it on the n-MOSFET; and performing UV irradiation to the remaining stress film. By the UV irradiation, a tensile stress of the stress film is improved. Further, although the stress film is cured by the UV irradiation, occurrence of etching defects caused by the curing is prevented because the UV irradiation is performed after the etching. Thus, speeding-up and high quality of the n-MOSFET can be attained.
    Type: Application
    Filed: December 15, 2006
    Publication date: May 29, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Sergey Pidin, Tamotsu Owada
  • Publication number: 20080057717
    Abstract: A semiconductor device manufacturing method that includes depositing a first insulating film on a semiconductor substrate, etching a part of the first insulating film, and performing UV irradiation to the first insulating film.
    Type: Application
    Filed: August 23, 2007
    Publication date: March 6, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Tamotsu OWADA, Hirofumi WATATANI, Shirou OZAKI, Hisaya SAKAI, Kenichi YANAI, Naoki OHARA, Tadahiro IMADA, Yoshihiro NAKATA
  • Publication number: 20070197032
    Abstract: A semiconductor device in which the diffusion of copper from a wire is prevented and a method for fabricating such a semiconductor device. For example, a via groove and a wire groove are formed in a multilayer structure including a UDC diffusion barrier film, a porous silica film, a middle UDC stopper film, a porous silica film, a UDC diffusion barrier film, and the like, and the surfaces the UDC diffusion barrier film, the middle UDC stopper film, and the UDC diffusion barrier film that get exposed in the via groove and the wire groove are irradiated with hydrogen plasma, thereby making the surface of each exposed SiC film silicon-rich. After the plasma irradiation, a Ta film is formed in the via groove and the wire groove and copper is embedded in these grooves. By making the surface of each SiC film which is to touch the Ta film silicon-rich in advance, the crystal structure of the Ta film can be controlled so that copper cannot pierce through the Ta film. This prevents copper from diffusing from a wire.
    Type: Application
    Filed: June 13, 2006
    Publication date: August 23, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Tamotsu Owada, Hisaya Sakai, Shun-ichi Fukuyama