Patents by Inventor Tatsuji Nagaoka

Tatsuji Nagaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200027730
    Abstract: A film forming method of forming an oxide film on a substrate, wherein the oxide film has germanium doped therein and comprises a property of a conductor or a semiconductor, is disclosed herein. The film forming method may include supplying mist of a solution to a surface of the substrate while heating the substrate, wherein an oxide film material including a constituent element of the oxide film and an organic germanium compound may be dissolved in the solution.
    Type: Application
    Filed: July 16, 2019
    Publication date: January 23, 2020
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY
    Inventors: Tatsuji NAGAOKA, Hiroyuki NISHINAKA, Masahiro YOSHIMOTO
  • Publication number: 20190288074
    Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.
    Type: Application
    Filed: May 31, 2019
    Publication date: September 19, 2019
    Inventors: Yuichi TAKEUCHI, Ryota SUZUKI, Tatsuji NAGAOKA, Sachiko AOI
  • Patent number: 10418494
    Abstract: In a method of manufacturing a semiconductor device, a Schottky electrode is formed on an upper surface of a semiconductor substrate. A second region of the semiconductor substrate is etched such that a first region becomes higher than a second region, a rising surface is formed between the first and second regions, and an outer peripheral edge of the Schottky electrode is located on the first region. An insulating film is formed on the upper surface of the semiconductor substrate such that the insulating film annularly extends along the rising surface. A field plate electrode is formed. The field plate electrode is electrically connected with the Schottky electrode and faces the upper surface of the semiconductor substrate via the insulating film within an area extending from the outer peripheral edge of the Schottky electrode to the second region over the rising surface.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: September 17, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsuji Nagaoka
  • Publication number: 20190259610
    Abstract: A film forming method of forming a gallium oxide film doped with fluorine on a base body includes supplying a mist of a solution in which a gallium compound and a fluorine compound are dissolved to a surface of the base body while heating the base body. In this film forming method, the gallium oxide film doped with fluorine is generated on the surface of the base body. In this film forming method, the gallium oxide film doped with fluorine can be suitably formed on the surface of the base body.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 22, 2019
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY
    Inventors: Tatsuji NAGAOKA, Hiroyuki NISHINAKA, Shota MORIMOTO, Masahiro YOSHIMOTO
  • Publication number: 20190214248
    Abstract: A film forming method of forming a film on a substrate includes: annealing the substrate; and supplying mist of a raw material solution of the film to a surface of the substrate after the annealing while heating the substrate at a temperature lower than a temperature of the substrate during the annealing.
    Type: Application
    Filed: January 3, 2019
    Publication date: July 11, 2019
    Applicant: Toyota Jidosha Kabushiki Kaisha
    Inventor: Tatsuji Nagaoka
  • Patent number: 10204980
    Abstract: A semiconductor device may include an element region and a peripheral voltage withstanding region. The peripheral voltage withstanding region includes inner circumferential guard rings; and outer circumferential guard rings having a width narrower than a width of the inner circumferential guard rings. An interval between the inner circumferential guard rings is narrower than an interval between the outer circumferential guard rings. Each of the inner circumferential guard rings includes a first high concentration region and a first low concentration region. Each of the outer circumferential guard rings includes a second high concentration region and a second low concentration region. A width of a part of each first low concentration region that is exposed on a front surface of the semiconductor device is wider than a width of a part of each second low concentration region that is exposed on the front surface.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: February 12, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Yoshifumi Yasuda, Tatsuji Nagaoka, Yasushi Urakami, Sachiko Aoi
  • Publication number: 20190043999
    Abstract: A diode includes: a semiconductor substrate including a first surface including a first range and a second range surrounding the first range, the first surface of the semiconductor substrate protruding in the first range from the second range such that the first surface having a step along a border between the first range and the second range; a first electrode that is in Schottky contact with the first electrode within the first range; an interlayer insulating film that covers the step, the second range, and an end portion of the first electrode; and a field plate electrode conductively connected to the first electrode. The field plate electrode covers a region of the interlayer insulating film covering the end portion of the first electrode and a region of the interlayer insulating film covering the step, and extends onto a region of the interlayer insulating film covering the second range.
    Type: Application
    Filed: January 31, 2017
    Publication date: February 7, 2019
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tatsuji NAGAOKA, Sachiko AOI, Yasushi URAKAMI
  • Publication number: 20190035944
    Abstract: A diode includes a semiconductor substrate; a top surface electrode in contact with a part of the top surface of the semiconductor substrate; and a bottom surface electrode in contact with at least a part of the bottom surface of the semiconductor substrate. The semiconductor substrate includes: an n-type high-concentration layer in ohmic contact with the bottom surface electrode; an n-type intermediate-concentration layer on a part of the n-type high-concentration layer; and an n-type low-concentration layer on a part of the n-type high-concentration layer. The n-type low-concentration layer surrounds the n-type intermediate-concentration layer. The top surface electrode is in Schottky contact with a top surface of the n-type intermediate-concentration layer, and a contact region where the top surface electrode and the semiconductor substrate are in contact extends onto then-type low-concentration layer beyond the n-type intermediate-concentration layer.
    Type: Application
    Filed: January 31, 2017
    Publication date: January 31, 2019
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tatsuji NAGAOKA, Sachiko AOI, Yasushi URAKAMI
  • Publication number: 20180371613
    Abstract: A film deposition apparatus for forming a film on a substrate is provided. The film deposition apparatus includes: a chamber in which the substrate is to be placed; a first heater configured to heat the chamber; a mist supply device configured to supply carrier gas including mist of source material solution of the film into the chamber; and a rectifier disposed within the chamber and configured to rectify a flow of the carrier gas including the mist. The rectifier includes a plurality of through holes through which the carrier gas flows, and the plurality of through holes extends toward the substrate placed in the chamber.
    Type: Application
    Filed: June 21, 2018
    Publication date: December 27, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsuji NAGAOKA
  • Patent number: 10153350
    Abstract: The bottom surface of the trench is provided so that a center part of the bottom surface protrudes upward with respect to a peripheral part of the bottom surface in a short direction. A thickness of the gate insulating film covering the peripheral part is thicker than a thickness of the gate insulating film covering the center part.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: December 11, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Jun Saito, Tatsuji Nagaoka, Sachiko Aoi, Yukihiko Watanabe, Shinichiro Miyahara, Takashi Kanemura
  • Publication number: 20180240864
    Abstract: A method of manufacturing a semiconductor device includes: preparing a semiconductor substrate provided with an ohmic-contact layer, a drift layer, and a high resistivity layer; forming an upper electrode having a contact area that is in contact with each of upper surfaces of the drift layer and the high resistivity layer, wherein an outer peripheral edge of the contact area is located on the high resistivity layer and the upper electrode is in Schottky contact with at least the drift layer; and forming a lower electrode being in ohmic contact with a lower surface of the ohmic-contact layer. In the semiconductor substrate, the drift layer is located on a first region of the upper surface of the ohmic-contact layer and the high resistivity layer is located on a second region of the upper surface of the ohmic-contact layer that surrounds the first region.
    Type: Application
    Filed: January 10, 2018
    Publication date: August 23, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsuji NAGAOKA
  • Publication number: 20180240914
    Abstract: In a method of manufacturing a semiconductor device, a Schottky electrode is formed on an upper surface of a semiconductor substrate. A second region of the semiconductor substrate is etched such that a first region becomes higher than a second region, a rising surface is formed between the first and second regions, and an outer peripheral edge of the Schottky electrode is located on the first region. An insulating film is formed on the upper surface of the semiconductor substrate such that the insulating film annularly extends along the rising surface. A field plate electrode is formed. The field plate electrode is electrically connected with the Schottky electrode and faces the upper surface of the semiconductor substrate via the insulating film within an area extending from the outer peripheral edge of the Schottky electrode to the second region over the rising surface.
    Type: Application
    Filed: January 10, 2018
    Publication date: August 23, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Tatsuji NAGAOKA
  • Patent number: 9972674
    Abstract: A technique stabilizing properties of SBDs is provided. An SBD is provided with a p-type contact region in contact with an anode electrode, and an n-type drift region in Schottky contact with the anode electrode. The p-type contact region includes a first p-type region having a corner portion, a second p-type region connected to the corner portion, and an edge filling portion located at a connection between the first p-type region and the second p-type region. First and second extended lines intersect at an acute angle, where the first extended line is a line extended from a contour of the first p-type region toward the connection and the second extended line is a line extended from a contour of the second p-type region toward the connection. An acute angle edge formed between the first extended line and the second extended line is filled with the edge filling portion.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: May 15, 2018
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tatsuji Nagaoka, Hiroki Miyake, Shinichiro Miyahara, Sachiko Aoi
  • Publication number: 20180114829
    Abstract: A semiconductor device includes a semiconductor substrate configured such that a trench is provided on a surface of the semiconductor substrate at a position of at least one of a boundary region disposed between a field-effect transistor region and a diode region, a boundary region disposed between the diode region and a peripheral voltage withstanding region, and a boundary region disposed between the field-effect transistor region and the peripheral voltage withstanding region; an insulating film covering an inner surface of the trench; and an electrode film covering an inner surface of the insulating film, the electrode film being configured to be electrically connected to one of a source electrode and an anode electrode.
    Type: Application
    Filed: September 11, 2017
    Publication date: April 26, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tatsuji NAGAOKA, Yukihiko WATANABE, Yasushi URAKAMI
  • Publication number: 20180019301
    Abstract: A semiconductor device may include an element region and a peripheral voltage withstanding region. The peripheral voltage withstanding region includes inner circumferential guard rings; and outer circumferential guard rings having a width narrower than a width of the inner circumferential guard rings. An interval between the inner circumferential guard rings is narrower than an interval between the outer circumferential guard rings. Each of the inner circumferential guard rings includes a first high concentration region and a first low concentration region. Each of the outer circumferential guard rings includes a second high concentration region and a second low concentration region. A width of a part of each first low concentration region that is exposed on a front surface of the semiconductor device is wider than a width of a part of each second low concentration region that is exposed on the front surface.
    Type: Application
    Filed: May 23, 2017
    Publication date: January 18, 2018
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Yoshifumi YASUDA, Tatsuji NAGAOKA, Yasushi URAKAMI, Sachiko AOI
  • Patent number: 9825123
    Abstract: A Schottky barrier diode provided herein includes: a semiconductor substrate; and an anode electrode being in contact with the semiconductor substrate. The semiconductor substrate includes: p-type contact regions being in contact with the anode electrode; and an n-type drift region being in contact with the anode electrode by Schottky contact in a range where the p-type contact regions are not provided The p-type contact regions includes: a plurality of circular regions located so that the circular regions are arranged at intervals between an outer side and an inner side at a contact surface between the semiconductor substrate and the anode electrode; and an internal region located in an inner portion of the circular region located on an innermost side at the contact surface and connected to the circular region located on the innermost side at the contact surface.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: November 21, 2017
    Assignees: Toyota Jidosha Kabushiki Kaisha, Denso Corporation
    Inventors: Tatsuji Nagaoka, Hiroki Miyake, Yukihiko Watanabe, Sachiko Aoi, Atsuya Akiba
  • Publication number: 20170309717
    Abstract: The bottom surface of the trench is provided so that a center part of the bottom surface protrudes upward with respect to a peripheral part of the bottom surface in a short direction. A thickness of the gate insulating film covering the peripheral part is thicker than a thickness of the gate insulating film covering the center part.
    Type: Application
    Filed: August 3, 2015
    Publication date: October 26, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Jun SAITO, Tatsuji NAGAOKA, Sachiko AOI, Yukihiko WATANABE, Shinichiro MIYAHARA, Takashi KANEMURA
  • Publication number: 20170278923
    Abstract: A technique stabilizing properties of SBDs is provided. An SBD is provided with a p-type contact region in contact with an anode electrode, and an n-type drift region in Schottky contact with the anode electrode. The p-type contact region includes a first p-type region having a corner portion, a second p-type region connected to the corner portion, and an edge filling portion located at a connection between the first p-type region and the second p-type region. First and second extended lines intersect at an acute angle, where the first extended line is a line extended from a contour of the first p-type region toward the connection and the second extended line is a line extended from a contour of the second p-type region toward the connection. An acute angle edge formed between the first extended line and the second extended line is filled with the edge filling portion.
    Type: Application
    Filed: October 19, 2015
    Publication date: September 28, 2017
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tatsuji NAGAOKA, Hiroki MIYAKE, Shinichiro MIYAHARA, Sachiko AOI
  • Patent number: 9735149
    Abstract: An SBD includes a semiconductor substrate; an anode electrode which is in Schottky contact with a front surface of the semiconductor substrate; and a cathode electrode which is in ohmic contact with a rear surface of the semiconductor substrate. A trench extending from the front surface of the semiconductor substrate toward the rear surface of the semiconductor substrate is provided in the semiconductor substrate, and an inner surface of the trench is covered with an insulating film. An insulating layer is deposited at a deep portion of the trench, and a conductive layer is deposited at a shallow portion of the trench. An n-type front surface region in contact with the anode electrode, an n-type rear surface region in contact with the cathode electrode, and an n-type intermediate region connecting the front surface region and the rear surface region are provided in the semiconductor substrate.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: August 15, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroki Miyake, Tatsuji Nagaoka
  • Publication number: 20160351560
    Abstract: An SBD includes a semiconductor substrate; an anode electrode which is in Schottky contact with a front surface of the semiconductor substrate; and a cathode electrode which is in ohmic contact. with a rear surface of the semiconductor substrate. A trench extending from the front surface of the semiconductor substrate toward the rear surface of the semiconductor substrate is provided in the semiconductor substrate, and an inner surface of the trench is covered with an insulating film. An insulating layer is deposited at a deep portion of the trench, and a conductive layer is deposited at a shallow portion of the trench. An n-type front surface region in contact with the anode electrode, an n-type rear surface region in contact with the cathode electrode, and an n-type intermediate region connecting the front surface region and the rear surface region are provided in the semiconductor substrate.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 1, 2016
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroki MIYAKE, Tatsuji NAGAOKA