Abstract: A semiconductor structure is formed in a SiC substrate. A thermal oxide film is formed on a front surface of the SiC substrate. An opening reaching the front surface of the SiC substrate is formed by etching a part of the thermal oxide film. The opening is filled with a material that becomes a Schottky electrode. Forming a sacrificial thermal oxide film on the front surface of the SiC substrate is not executed after the forming of the semiconductor structure and before the forming of the thermal oxide film.

Abstract: A diode is provided with a semiconductor substrate; an anode electrode located on a front surface of the semiconductor substrate; and a cathode electrode located on a rear surface of the semiconductor substrate. Each of the p-type contact regions includes: a first region being in contact with the anode electrode; a second region located on the rear surface side of the first region, having a p-type impurity density lower than a p-type impurity density in the first region; and a third region located on the rear surface side of the second region and having a p-type impurity density lower than the p-type impurity density in the second region. A thickness of the second region is thicker than a thickness of the first region.

Abstract: A Schottky barrier diode provided herein includes: a semiconductor substrate; and an anode electrode being in contact with the semiconductor substrate. The semiconductor substrate includes: p-type contact regions being in contact with the anode electrode; and an n-type drift region being in contact with the anode electrode by Schottky contact in a range where the p-type contact regions are not provided The p-type contact regions includes: a plurality of circular regions located so that the circular regions are arranged at intervals between an outer side and an inner side at a contact surface between the semiconductor substrate and the anode electrode; and an internal region located in an inner portion of the circular region located on an innermost side at the contact surface and connected to the circular region located on the innermost side at the contact surface.

Abstract: A semiconductor device disclosed herein is configured such that a well region including a well layer is disposed between a main region of a semiconductor substrate and a current sense region of the semiconductor substrate, that a well region electrode is disposed above the well region, and that the well layer and the well region electrode are in contact with each other through a contact hole formed in an interlayer insulating film.

Abstract: A semiconductor device disclosed herein is configured such that a well region including a well layer is disposed between a main region of a semiconductor substrate and a current sense region of the semiconductor substrate, that a well region electrode is disposed above the well region, and that the well layer and the well region electrode are in contact with each other through a contact hole formed in an interlayer insulating film.

Abstract: A semiconductor device includes a semiconductor substrate and a first electrode. An element region, and a non-element region that surrounds this element region, are formed on the semiconductor substrate. The first electrode is arranged on the semiconductor substrate and is electrically connected to the element region formed on the semiconductor substrate. The first electrode is made of at least two materials having different moduli of elasticity. A modulus of elasticity per unit area of an outer peripheral portion of the first electrode when the semiconductor substrate is viewed from above is smaller than a modulus of elasticity per unit area of a center portion of the first electrode.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: A semiconductor device includes a semiconductor substrate and a first electrode. An element region, and a non-element region that surrounds this element region, are formed on the semiconductor substrate. The first electrode is arranged on the semiconductor substrate and is electrically connected to the element region formed on the semiconductor substrate. The first electrode is made of at least two materials having different moduli of elasticity. A modulus of elasticity per unit area of an outer peripheral portion of the first electrode when the semiconductor substrate is viewed from above is smaller than a modulus of elasticity per unit area of a center portion of the first electrode.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: Provided is a semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed. A separation region formed of a p-type semiconductor is formed in a range between the diode region and the IGBT region and extending from an upper surface of the semiconductor substrate to a position deeper than both a lower end of an anode region and a lower end of a body region. A diode lifetime control region is formed within a diode drift region. A carrier lifetime in the diode lifetime control region is shorter than that in the diode drift region outside the diode lifetime control region. An end of the diode lifetime control region on an IGBT region side is located right below the separation region.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: Provided is a semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed. A separation region formed of a p-type semiconductor is formed in a range between the diode region and the IGBT region and extending from an upper surface of the semiconductor substrate to a position deeper than both a lower end of an anode region and a lower end of a body region. A diode lifetime control region is formed within a diode drift region. A carrier lifetime in the diode lifetime control region is shorter than that in the diode drift region outside the diode lifetime control region. An end of the diode lifetime control region on an IGBT region side is located right below the separation region.

Abstract: In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d2 of the deepest portion of the high-permittivity dielectric is designed to be deeper than the depth d1 of a depletion layer in the semiconductor region away from the high-permittivity dielectric.

Abstract: A MIS-type semiconductor device has reduced ON-resistance by securing an overlapping area between the gate electrode and the drift region, and has low switching losses by reducing the feedback capacitance. The MIS-type semiconductor device includes a p-type base region, an n-type drift region, a p+-type stopper region in the base region, a gate insulation film on the base region, a gate electrode on the gate insulation film, an oxide film on the drift region, a field plate on the oxide film, and a source electrode. The position (P) of the impurity concentration peak in base region is located more closely to the drift region. The oxide film is thinner on the side of the gate electrode. The field plate is connected electrically to the source electrode, the spacing (dg) between the gate insulation film and the stopper region is 2.5 ?m or narrower, and the minimum spacing (x) between the drain region and the stopper region is 5.6 ?m or narrower.

Abstract: A user sends a request signal to a delivery management server 60 by utilizing a mobile station 10 in response to a broadcast service provided by a broadcast station 70. The request signal includes a music song ID of music song data segments which the user wants to be delivered and also an address of the destination to which the music song data segments be delivered. Upon the receipt of the request signal, the delivery management server 60 returns, in the case of unpopular songs, the music song data segments and a decrypting key for decrypting the data segments, and on the other hand, it returns, in the case of popular songs, only the decrypting key to the mobile station 10 or a STB 40.

Abstract: In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d2 of the deepest portion of the high-permittivity dielectric is designed to be deeper than the depth d1 of a depletion layer in the semiconductor region away from the high-permittivity dielectric.

Abstract: The semiconductor apparatus is disclosed that includes a partial SOI substrate including an oxide film; a lateral first MOSFET section having a planar gate structure and formed in the portion of the partial SOI substrate where there is an oxide film; a vertical second MOSFET section having a trench gate structure and formed in the portion of the partial SOI substrate where there is no oxide film, the second MOSFET section being adjacent to the first MOSFET section. The first MOSFET section includes a first p-type base region on the oxide film. The second MOSFET section includes a second n+-type drain region, a second n-type drift region on the second n+-type drain region, and a second p-type base region in the surface portion of the second n-type drift region.

Abstract: A MIS-type semiconductor device has reduced ON-resistance by securing an overlapping area between the gate electrode and the drift region, and has low switching losses by reducing the feedback capacitance. The MIS-type semiconductor device includes a p-type base region, an n-type drift region, a p+-type stopper region in the base region, a gate insulation film on the base region, a gate electrode on the gate insulation film, an oxide film on the drift region, a field plate on the oxide film, and a source electrode. The position (P) of the impurity concentration peak in base region is located more closely to the drift region. The oxide film is thinner on the side of the gate electrode. The field plate is connected electrically to the source electrode, the spacing (dg) between the gate insulation film and the stopper region is 2.5 ?m or narrower, and the minimum spacing (x) between the drain region and the stopper region is 5.6 ?m or narrower.

Abstract: Program guide information of the program to be broadcast by the broadcast station 1 is reserved in the EPG server 15 of the center station 11. The EPG server 15 retrieves for each user, the program satisfying the conditions such as the category of the program registered in the personal information database 16, and then transmits the guide information of the retrieved programs to the portable telephone 14 of a user who has set the conditions, via the communication network 10. Thereby, even if the user is outside the home, if there is a program satisfying the conditions specified by the user, the user can obtain the information concerning the program by utilizing the portable telephone 14. Then, the user can instruct, with reference to the obtained program information, a recording operation from the portable telephone 14 to the VTR 6 in the home 12.