Abstract: According to an embodiment, an information processing apparatus includes a processing device, a first memory, a second memory, and a controller. The processing device is configured to process first data. The first memory is configured to store at least part of the first data and has an active region supplied with power necessary for holding data. The second memory is configured to store part of the first data. The controller is configured to change number of active regions such that processing information is not more than a threshold. The processing information indicates an amount of processing for moving at least part of second data stored in the first memory to the second memory and for moving at least part of third data stored in the second memory to the first memory, in a certain period for processing the first data having a size larger than active regions.

Abstract: According to an embodiment, in an information processing device, when there is no change in a first image received from an image sensor, reception of the next first image is awaited. When there is a change in the first image, a second image having a higher resolution than the first image is received from the image sensor and processing for the second image is performed.

Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.

Abstract: According to an embodiment, upon receiving a use request including an identifier of a program and authentication information, a use request processing unit makes a determination on validity of the use request based on an ID management information and access authority management information, generates an access key when the use request is valid, registers the access key in access key management information in correlation with a usable address range, and returns the access key to a transmission source of the use request. Upon receiving a read/write request including an address where reading-out or writing of data is performed and an access key, a read/write request processing unit makes a determination on validity of the read/write request based on the access key management information, and executes reading-out or writing of data with respect to a shared memory in response to the read/write request when the read/write request is valid.

Abstract: A management device according to an embodiment manages reading and writing of data, by a processing circuit, from and into a first memory unit and a non-volatile memory unit containing a plurality of pages, and includes a setting storage unit, an access processing circuit, and a management circuit. The setting storage unit stores an access method indicating whether first access processing of writing and reading data into and from data transferred to the first memory unit from the non-volatile memory unit or second access processing of directly writing and reading data into and from data stored in the non-volatile memory unit is executed for each of the pages. The management circuit changes the access method for a third page on which the second access processing is set to be performed to the first access processing when quality of the third page is equal to or lower than a reference value.

Abstract: According to an embodiment, a memory device includes a nonvolatile memory and a controller. The controller receives, from a host device, a write request for writing data in the nonvolatile memory, and then performs data writing based on the write request. When a writing order confirmation request, which is issued for confirmation of fact that data writing is performed based on one or more of the write requests that are already sent, is received from the host device, the controller performs data writing based on the write requests received before receiving the writing order confirmation request and then sends to the host device a response with respect to the writing order confirmation request.

Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.

Abstract: According to one embodiment, a memory device is connected to one or more information processing devices. The memory device includes a shared memory and a memory controller. The memory controller is configured to analyze an access to the shared memory by the one or more information processing devices and decide on an access method for accessing the shared memory by the one or more information processing devices. The memory controller is configured to give an instruction indicating the decided access method to the one or more information processing devices.

Abstract: According to an embodiment, upon receiving a use request including an identifier of a program and authentication information, a use request processing unit makes a determination on validity of the use request based on an ID management information and access authority management information, generates an access key when the use request is valid, registers the access key in access key management information in correlation with a usable address range, and returns the access key to a transmission source of the use request. Upon receiving a read/write request including an address where reading-out or writing of data is performed and an access key, a read/write request processing unit makes a determination on validity of the read/write request based on the access key management information, and executes reading-out or writing of data with respect to a shared memory in response to the read/write request when the read/write request is valid.

Abstract: A management device according to an embodiment manages reading and writing of data, by a processing circuit, from and into a first memory unit and a non-volatile memory unit containing a plurality of pages, and includes a setting storage unit, an access processing circuit, and a management circuit. The setting storage unit stores an access method indicating whether first access processing of writing and reading data into and from data transferred to the first memory unit from the non-volatile memory unit or second access processing of directly writing and reading data into and from data stored in the non-volatile memory unit is executed for each of the pages. The management circuit changes the access method for a third page on which the second access processing is set to be performed to the first access processing when quality of the third page is equal to or lower than a reference value.

Abstract: According to an embodiment, a management device includes a counter storage unit, a first management information storage unit, and an update unit. The first management information storage unit stores a first management table capable of storing first management information about each of a predetermined number of first areas. The first management information indicates whether each second area included in a corresponding first area has data written therein. In response to writing of first data into the nonvolatile memory, when a state of a target second area indicated in the first management information about a target first area is an unwritten state, the update unit changes the state of the target second area to a written state; while when the state of the target second area indicated in the first management information is the written state, the update unit updates the counter value for the target first area.

Abstract: An information processing device according to an embodiment includes a storage device and one or more processors configured to function as a setting unit and a record control unit. The setting unit sets a record level of history information according to a reliability of derivative information derived from output information of a sensor. The record control unit performs control to store the history information in the storage device according to the record level.

Abstract: According to an embodiment, a power supply system includes a power storage unit, a changeover unit, and a control unit. The power storage unit is configured to store electric power generated by a power generation unit. The changeover unit is configured to make a changeover between a first state in which a load is connected to the power generation unit and a second state in which the load is connected to the power storage unit but not the power generation unit. The control unit is configured to perform control to make the changeover to the first state when a value obtained by subtracting a first value from a value of the electric power fed from the power generation unit is not less than a value of the electric power fed to the load. Otherwise, the control unit is configured to perform control to make the changeover to the second state.

Abstract: According to an embodiment, a memory device includes a nonvolatile memory, a controller, and power storage. The controller is configured to receive, from a host device, a write request for writing data into the nonvolatile memory, and then, write the data based on the write request. The power storage is configured to store power supplied from a power supply. The controller writes, when abnormality in power supplied from the power supply to the memory device is detected, the data based on the write request that has already been received, using the power supplied from the power storage.

Abstract: According to an embodiment, an electronic circuit board includes a nonvolatile memory, a reading circuit to read data stored in the nonvolatile memory, a switch, and a communication circuit. When power is supplied from a first power source, the switch performs switching to a first state in which the nonvolatile memory and a host device configured to read and write data from and in the nonvolatile memory are connected. When power is supplied from a second power source, the switch performs switching to a second state in which the host device and the nonvolatile memory are not connected and the reading circuit and the nonvolatile memory are connected. The communication circuit transmits, to an external device, the data read by the reading circuit from the nonvolatile memory when power is being supplied from the second power source.

Abstract: According to one embodiment, a memory controller includes a nonvolatile cache memory and a controller. The nonvolatile cache memory is configured to store a piece of data stored in a nonvolatile main memory connected to the memory controller. The controller is configured to control writing of data to the nonvolatile cache memory. The memory controller is connected to a processor via an interconnect that ensures a protocol indicating a procedure for preventing data inconsistency in a plurality of cache memories. The controller causes, after detecting that the processor has updated data corresponding to any area of the nonvolatile main memory using the protocol, the updated data to be transmitted to the memory controller and writes the updated data to the nonvolatile cache memory.

Abstract: According to an embodiment, a semiconductor memory device includes a first memory, a second memory, a switch, and a controller. The switch switches between various states including between a first state and a second state. In the first state, the first memory is connected to a host device that reads data from and writes data to the first memory and the second memory is not connected to the host device. In the second state, the first memory is connected to the second memory and the host device is connected to neither the first memory nor the second memory. The controller directs, upon receiving a movement command from the host device, the switch to switch to the second state to move data between the first memory and the second memory.

Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.

Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.

Abstract: According to an embodiment, a communication device includes a register and a controller. The register receives data from an external device via an input data line. In a first state in which the communication device is able to receive the data, when a condition in which the data is not sent to the input data line continues for a certain period of time, the controller controls to switch state of the communication device to a second state in which power consumption is less than in the first state.