Patents by Inventor Tetsuji Hori

Tetsuji Hori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030057573
    Abstract: A semiconductor device according to an aspect of the present invention includes a lead frame formed substantially on a single plane, a power semiconductor element and a control semiconductor element mounted on the lead frame, a first conductor electrically connecting the power semiconductor element and the lead frame, and a second conductor electrically connecting the control semiconductor element and the lead frame; and a heat sink formed, via an insulating layer, on a surface of the lead frame at a side opposite to a side on which the power semiconductor element and the control semiconductor element are mounted. The heat sink is spaced apart from the lead frame at a periphery portion thereof so that a distance between the heat sink and the lead frame is gradually increased in a direction perpendicular to the surface of the lead frame on which the power semiconductor element and the control semiconductor element are mounted.
    Type: Application
    Filed: September 23, 2002
    Publication date: March 27, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshitaka Sekine, Tetsuji Hori
  • Patent number: 6469398
    Abstract: A semiconductor package includes a semiconductor chip. The semiconductor chip includes first and second electrodes disposed on a top side, and a third electrode disposed on a bottom side. A heat spreader is bonded to the third electrode. First and second conductive leads are electrically connected to the first and second electrodes through first and second conductive bonding members, respectively. The first and second leads respectively include foot portions at their lower ends, which are juxtaposed on a first side of the heat spreader. The heat spreader and the foot portions of the first and second leads have bottom faces, which are exposed on the bottom of an insulating sealing body, and are disposed on the same plane.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: October 22, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuji Hori
  • Publication number: 20020140067
    Abstract: A semiconductor package includes a semiconductor chip. The semiconductor chip includes first and second electrodes disposed on a top side, and a third electrode disposed on a bottom side. A heat spreader is bonded to the third electrode. First and second conductive leads are electrically connected to the first and second electrodes through first and second conductive bonding members, respectively. The first and second leads respectively include foot portions at their lower ends, which are juxtaposed on a first side of the heat spreader. The heat spreader and the foot portions of the first and second leads have bottom faces, which are exposed on the bottom of an insulating sealing body, and are disposed on the same plane.
    Type: Application
    Filed: March 21, 2002
    Publication date: October 3, 2002
    Inventor: Tetsuji Hori
  • Patent number: 6355075
    Abstract: A polishing composition comprising an abrasive, an anticorrosive, an oxidizing agent, an acid, a pH regulator and water and having a pH within a range of from 2 to 5, wherein the abrasive is colloidal silica or fumed silica, and its primary particle size is at most 20 nm.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: March 12, 2002
    Assignees: Fujimi Incorporated, Fujimi America Inc.
    Inventors: Katsuyoshi Ina, W. Scott Rader, David M. Shemo, Tetsuji Hori
  • Publication number: 20010029095
    Abstract: Disclosed is a high-temperature solder material which is composed of tin, zinc and silver, or of 0.01 to 2 wt % germanium or aluminum and the balance tin, or tin and zinc at a ratio of 80/20 to 70/30. The tin/zinc/silver solder has a composition ratio that the ratio of till to zinc is within a range of 97/3 to 79/21 by weight, and the ratio of the sum of tin and zinc to silver is within a range of 88/12 to 50/50 by weight, or that the ratio of tin to zinc is within a range of 70/30 to 5/95 by weight, and the ratio of silver to the sum of tin, zinc and silver is 15% by weight or less. The solder material is used for producing electric or electronic devices and equipments.
    Type: Application
    Filed: December 28, 2000
    Publication date: October 11, 2001
    Inventors: Masahiro Tadauchi, Izuru Komatsu, Hiroshi Tateishi, Kouichi Teshima, Kazutaka Matsumoto, Tetsuji Hori
  • Patent number: 6225701
    Abstract: Disclosed is a semiconductor device provided with a heat-sink. The semiconductor device comprises a laminated insulating film formed on the heat-sink, a lead-frame mounted on the laminated insulating film, a semiconductor chip mounted to the lead-frame, and a molding resin for molding the semiconductor chip. The laminated insulating film comprises a first insulating resin layer formed on the side of the heat-sink and a second insulating resin layer formed on the side of the lead-frame. The first insulating resin layer is made of an epoxy resin containing 80 wt % of a heat dissipating filler. Also, the second insulating resin layer is made of an epoxy resin containing 70 wt % of a heat dissipating filler.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: May 1, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuji Hori, Cao Minh Thai
  • Patent number: D475028
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: May 27, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuji Hori, Takayuki Yoshihira, Yuuji Hiyama, Gentaro Ookura