Patents by Inventor Thomas A. Wassick

Thomas A. Wassick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6235544
    Abstract: A multilayer thin film structure (MLTF) is provided having no extraneous via-pad connection strap plated metallurgy for defective vias needing removal. The method for making or repairing the MLTF comprises determining interconnection defects in the MLTF at a thin film layer adjacent to the top metal layer of the structure, applying a top surface dielectric layer and forming vias in the layer, applying a metal conducting layer and removing the metal conducting layer for via-pad connection straps of defective vias and at the intersection of XY lines used in the repair, defining the top surface metallization including a series of orthogonal X conductor repair lines and Y conductor repair lines using a photoresist and lithography and then using a phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forming the top surface metallization using additive or subtractive metallization techniques.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: May 22, 2001
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franklin, Charles J. Hendricks, Richard P. Surprenant, Stephen J. Tirch, III, Thomas A. Wassick, James P. Wood
  • Patent number: 6054749
    Abstract: A process for partially repairing defective Multi-Chip Module (MCM) Thin-Film (TF) wiring nets. The process comprises the steps of locating a short circuit between any two nets of the MCM, identifying a site to cut in one of the two nets, and deleting an internal portion of one of the two nets at the identified site.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: April 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Peter A. Franklin, Carmine J. Mele, Arthur G. Merryman, John R. Pennacchia, Kurt A. Smith, Thomas A. Wassick, Thomas A. Wayson, Roy Yu
  • Patent number: 6048741
    Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: April 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick
  • Patent number: 6002267
    Abstract: A test pad is formed outside an array of pads included in connection structures such as pin mounting pads to which connection pins may be brazed in, for example, bottom side metallurgy of a multi-layer modular electronic package. In-line voltage plane testing may then be accomplished through temporary connections to the test pads for any desired layer, such as top side metallurgy distribution layers, while protecting the pin-mounting pads from physical and/or chemical damage or contamination during manufacturing processes for addition of layers to the electrical interconnection structure of the multi-layer module.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: December 14, 1999
    Assignee: International Business Machines Corp.
    Inventors: Ashwani K. Malhotra, John R. Pennacchia, Ronald R. Shields, Thomas A. Wassick
  • Patent number: 5972723
    Abstract: A process for partially repairing defective Multi-Chip Module (MCM) Thin-Film (TF) wiring nets. The process comprises the steps of locating a short circuit between any two nets of the MCM, identifying a site to cut in one of the two nets, and deleting an internal portion of one of the two nets at the identified site.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: October 26, 1999
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Peter A. Franklin, Carmine J. Mele, Arthur G. Merryman, John R. Pennacchia, Kurt A. Smith, Thomas A. Wassick, Thomas A. Wayson, Roy Yu
  • Patent number: 5937269
    Abstract: A Process for graphically assisting the partial repair of defective MCM TF wiring nets. The process comprises the steps of inserting the wiring layer of the thin-film device in a tester, scanning the wiring layer of the thin-film device with the tester, identifying defects in the wiring nets, prioritizing the defects based on a function of each of the defective wiring nets, and repairing the defects based on priority.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: August 10, 1999
    Assignee: International Business Machines Corporation
    Inventors: Roy Yu, Gerald K. Bartley, Peter A. Franklin, Carmine J. Mele, Arthur G. Merryman, John R. Pennacchia, Kurt A. Smith, Thomas A. Wassick, Thomas A. Wayson
  • Patent number: 5543584
    Abstract: The present invention relates generally to a new method of repairing electrical lines, and more particularly to repairing electrical lines having an opening at the module level with devices in place. Various methods and processes are used to repair this open or defective portion in an electrical conductor line. It could be repaired by securing a jumper wire or nugget across the open or the repair could be made by a deposition process, which includes but is not limited to filling the opening with a solder type material or inserting a solder coated electrical wire and heating the solder and allowing the solder to melt and repair the open. One of the attributes of this invention is the ability to repair on a substrate or module on which active components such as chips, and passive components such as pins, capacitors, etc. have been attached. The invention also allows repair of fine line patterns which are normally not repairable by conventional techniques.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: August 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Edward F. Handford, Joseph M. Harvilchuck, Mario J. Interrante, Raymond A. Jackson, Raj N. Master, Sudipta K. Ray, William E. Sablinski, Thomas A. Wassick
  • Patent number: 5246745
    Abstract: Control of the local environment during pulsed laser removal of thin film circuit metallurgy is used to change the nature of the top surfaces. Interconnecting such laser treated surfaces with LCVD films results in different growth morphologies, dependent on the nature of the surface created and the debris generated during the ablation process. Flowing helium across the surface during the ablation process results in improved growth morphologies for the same laser writing conditions. A low power laser scan is used to induce metal deposition on the substrate without surface damage. This is followed by several scans at an intermediate laser power to deposit the desired thickness of metal (e.g., about 8 .mu.m). Lastly, a high power laser scan is used, either at the points of intersection between the existing metallurgy and the metal repair or across the entire deposit area. Thermal spreading or blooming is reduced by modulating the intensity of the laser source.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: September 21, 1993
    Assignee: International Business machines Corporation
    Inventors: Thomas H. Baum, Paul B. Comita, John R. Lankard Sr., Thoams F. Redmond, Thomas A. Wassick, Robert L. Jackson
  • Patent number: 5153408
    Abstract: The present invention relates generally to a new method of repairing electrical lines, and more praticularly to repairing electrical lines having an open at the module level with devices in place. Various methods and processes are used to repair this open or defective portion in an electrical conductor line. It could be repaired by securing a jumper wire or nugget across the open or the repair could be made by a deposition process, which includes but is not limited to filling the open with a solder type material or inserting a solder coated electrical wire and heating the solder and allowing the solder to melt and repair the open. One of the attributes of this invention is the ability to repair on a substrate or module on which active components such as chips, and passive components such as pins, capacitors, etc. have been attached. The invention also allows repair of fine line patterns which are normally not repairable by conventional techniques.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: October 6, 1992
    Assignee: International Business Machines Corporation
    Inventors: Edward F. Handford, Joseph M. Harvilchuck, Mario J. Interrante, Raymond A. Jackson, Raj N. Master, Sudipta K. Ray, William E. Sablinski, Thomas A. Wassick
  • Patent number: 4684437
    Abstract: A differential material removal process wherein a selected material can be rapidly removed without adverse impact to surrounding layers of different materials. Ultraviolet radiation is used to selectively remove metal without adversely harming adjacent polymer layers, in a metal-polymer multilayer structure. The wavelength (100-400 nm) of the ultraviolet radiation and the energy fluence per pulse are selected so that the removal rate of metal due to thermal processes is significantly greater than the removal rate of the polymer by ablative photodecomposition. This can occur at an energy fluence per pulse level greater than that at which the etch rate of the polymer begins to level off. For example, copper of a thickness less than 5 microns is rapidly etched in one or two pulses while adjacent polyimide layers are substantially unetched by the application of ultraviolet pulses of wave-lengths 248-351 nm, at energy fluences per pulse in excess of approximately 3 or 4 J/cm.sup.2.
    Type: Grant
    Filed: October 31, 1985
    Date of Patent: August 4, 1987
    Assignee: International Business Machines Corporation
    Inventors: John J. Donelon, Yaffa Tomkiewicz, Thomas A. Wassick, James T. Yeh