Patents by Inventor Thomas Blon
Thomas Blon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10951217Abstract: A device and method for controllably delaying an electrical signal includes a first signal transfer path between a signal input and a signal output. The first signal transfer path includes a first signal transfer stage with a first differential pair and a common, adjustable first quiescent current source, and a second signal transfer path between the signal input and the signal output. The second signal transfer path includes a second signal transfer stage with a second differential pair and a common, adjustable second quiescent current source. An internal delay stage is arranged between the signal input and the second signal transfer stage and has a third differential pair and a common, adjustable third quiescent current source, and signal combination stage for additively superimposing the electrical signal transferred via the first signal transfer path on to the electrical signal transferred via the second signal transfer path.Type: GrantFiled: January 14, 2019Date of Patent: March 16, 2021Assignee: Silicon Line GmbHInventor: Thomas Blon
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Publication number: 20190245545Abstract: In order to prevent or at least reduce parasitic capacitive loads at a device (200) for controllably delaying an electrical signal, the device comprising a first signal transfer path (207) between a signal input (201) and a signal output (204), the first signal transfer path (207) comprising a first signal transfer stage (208) with a first differential pair (209) and a common, adjustable first quiescent current source (212), a second signal transfer path (213) between the signal input (201) and the signal output (204), the second signal transfer path (213) comprising a second signal transfer stage (214) with a second differential pair (215) and a common, adjustable second quiescent current source (218), and an internal delay stage (219), arranged between the signal input (201) and the second signal transfer stage (214) and having a third differential pair (220) and a common, adjustable third quiescent current source (223), and a signal combination stage (224) for additively superimposing the electrical sigType: ApplicationFiled: January 14, 2019Publication date: August 8, 2019Applicant: Silicon Line GmbHInventor: Thomas BLON
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Patent number: 9489335Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: GrantFiled: February 14, 2014Date of Patent: November 8, 2016Assignee: SILICON LINE GMBHInventors: Thomas Blon, Thomas Suttorp, Holger Hoeltke
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Patent number: 9455751Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which the power consumption required for the transfer of L[ow]P[ower] data is as low as possible.Type: GrantFiled: February 14, 2014Date of Patent: September 27, 2016Assignee: SILICON LINE GMBHInventors: Thomas Blon, Holger Hoeltke
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Patent number: 9455826Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: GrantFiled: February 14, 2014Date of Patent: September 27, 2016Assignee: SILICON LINE GMBHInventors: Thomas Blon, Florian Jansen, Holger Hoeltke
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Patent number: 9231755Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a full duplex data transmission is possible.Type: GrantFiled: February 14, 2014Date of Patent: January 5, 2016Assignee: SILICON LINE GMBHInventors: Thomas Blon, Florian Jansen, Martin Groepl
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Patent number: 9231756Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which it is possible to further reduce the size of tools, which are associated with said type of circuit arrangement and said type of method.Type: GrantFiled: February 14, 2014Date of Patent: January 5, 2016Assignee: SILICON LINE GMBHInventors: Thomas Blon, Florian Jansen, Holger Hoeltke
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Patent number: 9219598Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: GrantFiled: February 14, 2014Date of Patent: December 22, 2015Assignee: SILICON LINE GMBHInventors: Thomas Blon, Thomas Suttorp, Holger Hoeltke
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Patent number: 9197361Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a transmission arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: GrantFiled: February 14, 2014Date of Patent: November 24, 2015Assignee: Silicon Line GmbHInventors: Thomas Blon, Florian Jansen
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Publication number: 20150043675Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a transmission arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Florian JANSEN
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Publication number: 20150043690Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Thomas SUTTORP, Holger HOELTKE
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Publication number: 20150043674Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which the power consumption required for the transfer of L[ow]P[ower] data is as low as possible.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Holger HOELTKE
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Publication number: 20150043689Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Florian JANSEN, Holger HOELTKE
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Publication number: 20150043691Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a full duplex data transmission is possible.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Florian JANSEN, Martin GROEPL
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Publication number: 20150043692Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which it is possible to further reduce the size of tools, which are associated with said type of circuit arrangement and said type of method.Type: ApplicationFiled: February 14, 2014Publication date: February 12, 2015Applicant: SILICON LINE GMBHInventors: Thomas BLON, Florian JANSEN, Holger HOELTKE
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Publication number: 20140369366Abstract: On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.Type: ApplicationFiled: February 14, 2014Publication date: December 18, 2014Applicant: SILICON LINE GMBHInventors: Thomas BLON, Thomas SUTTORP, Holger HOELTKE
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Patent number: 7466199Abstract: The invention relates to an amplifier circuit comprising supply terminals (12, 14) for supplying the circuit with first and second supply potentials (Vdd, Vss); a current path, which runs from the first supply terminal (12) via a first biased transistor (P1a, P1b), a first node (K1a, K1b), an input transistor (Q1a, Q1b), a second node (K2a, K2b) and a second biased transistor (N1a, N1b) to the second supply terminal (14), wherein a control terminal of the input transistor is loaded with an input signal (inp-inn), and wherein the second node (K2a, K2a) forms a pick-up in a resistor chain (R2a, R1, R2b), at whose ends is supplied an output signal (outp-outn) as a voltage drop; and a feedback stage enabling the current to flow the resistor chain (R2a, R1, R2b) dependent on the input signal (inp-inn) so that the current flowing through the input transistor (Q1a, Q1b) is essentially independent of the input signal (inp-inn), wherein the feedback stage has a pair of complementarily coupled transistors (P3a, N3a, P3Type: GrantFiled: April 4, 2007Date of Patent: December 16, 2008Assignee: National Semiconductor Germany AGInventor: Thomas Blon
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Patent number: 7423482Abstract: The present invention relates to a circuit configuration (10) having a feedback operational amplifier (AMP) for amplifying an input signal (Vin) input into the circuit arrangement (10) and outputting the amplified input signal as an output signal (Vout). The circuit amplification (Vout/Vin) may be changed by selectively connecting or disconnecting impedances (R1, . . . RN). Integration elements (INT1. . . INT N) connected upstream from each of the control inputs of transistors (S1, . . . SN) used for this purpose ensure a certain temporal smoothing of the curve of the circuit amplification (Vout/Vin) when connecting or disconnecting an impedance (R1, . . . RN). The integration element particularly ensures that even in the event of a sudden change of the affected activation signal (VD1, . . . VDN), the affected impedance (R1, . . . RN) is not also suddenly disconnected or connected.Type: GrantFiled: September 20, 2006Date of Patent: September 9, 2008Assignee: National Semiconductor Germany AGInventor: Thomas Blon
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Patent number: 7414467Abstract: The present invention relates to a circuit configuration having a feedback operational amplifier (AMP), which is implemented as fully differential, for amplifying an input signal differentially input to the circuit configuration and for outputting the amplified input signal as a differential output signal. In order to increase the freedom in setting the input common mode voltage, according to the present invention, a combination made of a coupling resistor (R1b) and a level shifter (I1b, Nsfb) connecting the positive amplifier output (y1) to the inverting amplifier input (x2) and a combination made of a coupling resistor (R1a) and a level shifter (I1a, Nsfa) connecting the negative amplifier output (y2) to the noninverting amplifier input (x1) are provided.Type: GrantFiled: November 15, 2006Date of Patent: August 19, 2008Assignee: National Semiconductor Germany AGInventor: Thomas Blon
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Patent number: 7368987Abstract: The present invention relates to a circuit configuration (10) having a feedback operational amplifier (AMP) for amplifying an input signal (Vin) input into the circuit arrangement (10) and outputting the amplified input signal as an output signal (Vout). In order to be able to change the circuit amplification (Vout/Vin) easily and reliably in the circuit configuration (10) and simultaneously keep an impairment of the output signal (Vout) caused by noise relatively low, capacitance values (Cb, C) of the coupling path (12) and of the feedback path (14) are adjusted simultaneously to one another correlated in a special way.Type: GrantFiled: September 20, 2006Date of Patent: May 6, 2008Assignee: National Semiconductor Germany AGInventor: Thomas Blon