Patents by Inventor Thomas Conway

Thomas Conway has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100211961
    Abstract: A system/method is introduced that integrates middleware components without canonicalization of data at runtime, where the system/method receives inputs identifying at least a first and second middleware to be made interoperative (via a communication path between an in-port corresponding to the first middleware and an out-port corresponding to the second middleware), receives an incoming message at the in-port, handles the received message as a plurality of parts and where, for each part, a data-object is created based on an identified type factory, with the in-port populating the data-object with values from corresponding part of the message and passing the populated data object from the in-port corresponding to the first middleware to the out-port corresponding to the second middleware.
    Type: Application
    Filed: April 28, 2010
    Publication date: August 19, 2010
    Applicant: IONA TECHNOLOGIES LIMITED
    Inventors: PETER LAWRENCE COUSINS, Desmond Carbery, Alan Thomas Conway
  • Patent number: 7721005
    Abstract: A system and method is introduced that integrates middleware components without canonicalization of data at runtime. An interface receives inputs identifying at least a first and second middleware to be made interoperative and a configurator configures at least an in-port and an out-port based on a binding and transport associated with the first and second middleware, respectively. Interoperation of the first and second middleware is effected via at least one communication path between the configured in-port and out-port, wherein the communication path allows an incoming message to pass from the in-port corresponding to said first middleware to the out-port corresponding to the second middleware without the creation of an intermediate canonical message.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: May 18, 2010
    Assignee: IONA Technologies Limited
    Inventors: Peter Lawrence Cousins, Desmond Carbery, Alan Thomas Conway
  • Publication number: 20090052293
    Abstract: The use of a multi-track format in both optical and magnetic data storage applications provides for a number of improvements to system performance including data density and data transfer rates. However, the full advantage in data density can only be achieved through the use of joint equalization and joint detection. The complexity of implementation of these functions arc addressed with a transform domain equalization architecture and a reduced complexity detection method based on a breadth first search of a time-varying trellis. The trellis results from a one dimensional representation of a two dimensional target response, obtained by arranging samples from adjacent tracks in a sequence that respects the original proximity of the samples.
    Type: Application
    Filed: November 7, 2005
    Publication date: February 26, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventors: Thomas Conway, Richard Conway
  • Publication number: 20070085709
    Abstract: The present invention relates to a symbol detection apparatus for detecting the symbol values of a two-dimensional channel data stream recorded on a record carrier, said channel data stream comprising a set of contiguous symbol strips (B) of symbol rows (r) onedimensionally evolving along a first direction and being aligned with each other along a second direction, said two directions constituting a two-dimensional lattice of symbol positions.
    Type: Application
    Filed: November 18, 2004
    Publication date: April 19, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTRONIC, N.V.
    Inventors: Willem Coene, Albert Immink, Thomas Conway
  • Publication number: 20060207955
    Abstract: A vertical display unit for mounting to a vertical post of an associated structure that has apertures formed therein. First and second brackets include fastening mechanisms that are used to fasten the spine to the brackets and securing mechanisms that are used to secure the brackets to the associated structure. The brackets include first and second spacers that are positioned between the spine and the associated structure so that a portion of the spine is spaced from a portion of the associated structure. Any combination of first and second wings or spine attachments are attached to the spine. Wing attachments may also be fastened to the first and second wings. The wing attachments, first and second wings, and/or the spine attachments can accommodate goods to be displayed.
    Type: Application
    Filed: March 16, 2005
    Publication date: September 21, 2006
    Applicant: Cormark, Inc.
    Inventors: Jeffrey Ouyang, Thomas Conway, John Feeney
  • Publication number: 20060054749
    Abstract: A mount for securing an associated object such as a sign to a supporting structure having wall defining an opening therein and having an outer surface and an inner surface, includes a mounting element adapted to receive the object. The mounting element has a body having an opening therein that is defined by edges. The opening has a predetermined shape. The body has a pair of resilient fingers extending rearwardly from the body. The fingers define portions of the edges of the opening in the body. A wedge has a base and a pair of resilient legs depending from the base. The wedge has a predetermined shape adapted for receipt in the body opening. The legs each have a notch formed therein. The mounting element is positioned with the resilient fingers in the supporting structure wall opening with the fingers locked to the supporting structure wall and the wedge is received in the body opening to interfere with the mounting element fingers flexing inward, securing the mounting element to the support structure.
    Type: Application
    Filed: September 14, 2004
    Publication date: March 16, 2006
    Applicant: Cormark, Inc.
    Inventors: Thomas Conway, Scott Padiak, Paul Evans
  • Publication number: 20050269466
    Abstract: An adjustable, channel-mount system for mounting a sign to a shelf includes a spring-loaded mounting bracket having a mounting portion moveably connected to a sign-holding portion and an elongated sign-holder. The sign-holding portion of the mounting bracket features at least one channel. At least one securing element configured for engagement with the at least one channel of the sign-holding portion of the mounting bracket is included on a back surface of the sign-holder.
    Type: Application
    Filed: June 2, 2004
    Publication date: December 8, 2005
    Applicant: Cormark, Inc.
    Inventors: Thomas Conway, Scott Padiak, Paul Evans
  • Publication number: 20050238122
    Abstract: A detector system detects values on a storage medium where there is ISI. The symbols are stored as pits in a close hexagonal lattice having u, v, and x dimensions at mutual 60° separations from an individual pit. The value for a particular symbol is determined by generating an estimate for the symbol in each of the u, v, and x dimensions. These estimates are used to generate a decision for the symbol as it is at the intersection of these dimensions. Thus a number of 1-dimensional detectors can be used although the platform is two-dimensional with ISI.
    Type: Application
    Filed: April 8, 2005
    Publication date: October 27, 2005
    Inventor: Thomas Conway
  • Publication number: 20050040305
    Abstract: A biased-assisted sign mounting system is for mounting a sign to a structure, that includes a vertical upright post having a face having a plurality of vertically extending, spaced apart openings. The mounting system includes a spine adapted to mount to the vertical post. The spine has a face portion. Upper and lower sign mount portions are mounted to the spine. At least one of the mount portions has a biasing element securing portion. Upper and lower arms are mounted to respective upper and lower sign mount portions. The arms each have a pivot defining collinear axes. One of the upper and lower arms has a biasing element securing portion. A biasing element operably connects one of the arms to its respective mount portion such that the arm is pivotal between first and second positions and is biased toward the first and second positions by the biasing element. A floating insert mounts the spine to the upright.
    Type: Application
    Filed: April 16, 2004
    Publication date: February 24, 2005
    Inventors: Thomas Conway, Scott Padiak, Paul Evans
  • Patent number: 6854002
    Abstract: A data processing circuit includes a digital data source having an output carrying a sequence of digital signals. A pre-filter is coupled to the output of the digital data source. The pre-filter has a first output that carries a second sequence of digital signals and a second output that carries a third sequence of digital signals. The second sequence of digital signals is time shifted relative to the third sequence of digital signals. The circuit also includes an interpolation circuit with a first input coupled to the first output of the pre-filter and a second input coupled to the second output of the pre-filter.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: February 8, 2005
    Assignee: STMicroelectronics NV
    Inventors: Thomas Conway, Jason Byrne
  • Publication number: 20030182335
    Abstract: A data processing circuit includes a digital data source having an output carrying a sequence of digital signals. A pre-filter is coupled to the output of the digital data source. The pre-filter has a first output that carries a second sequence of digital signals and a second output that carries a third sequence of digital signals. The second sequence of digital signals is time shifted relative to the third sequence of digital signals. The circuit also includes an interpolation circuit with a first input coupled to the first output of the pre-filter and a second input coupled to the second output of the pre-filter.
    Type: Application
    Filed: May 16, 2003
    Publication date: September 25, 2003
    Inventors: Thomas Conway, Jason Byrne
  • Patent number: 6591283
    Abstract: A data processing circuit includes a digital data source having an output carrying a sequence of digital signals. A pre-filter is coupled to the output of the digital data source. The pre-filter has a first output that carries a second sequence of digital signals and a second output that carries a third sequence of digital signals. The second sequence of digital signals is time shifted relative to the third sequence of digital signals. The circuit also includes an interpolation circuit with a first input coupled to the first output of the pre-filter and a second input coupled to the second output of the pre-filter.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: July 8, 2003
    Assignee: STMicroelectronics N.V.
    Inventors: Thomas Conway, Jason Byrne
  • Patent number: 6522705
    Abstract: The invention provides an apparatus for decoding a coded digital data sequence. The apparatus includes a first Viterbi decoder of a first response type, a first filter and a second filter. The first and second filters are coupled to receive decoded sequences from the first Viterbi decoder. The first Viterbi decoder generates a first decoded sequence from the coded digital data sequence. The first and second filters generate respective first and second error signals in response to receiving the first decoded sequence. The first and second error sequences indicate differences between the first decoded sequence and second and third decoded sequences, respectively. The second and third decoded sequences are probable sequences produced by Viterbi decoders of respective second and third response types in response to receiving the coded digital data sequence.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: February 18, 2003
    Assignee: STMicroelectronics N.V.
    Inventors: Thomas Conway, Philip Quinlan
  • Patent number: 6487672
    Abstract: A baud rate digital timing recovery circuit for use in the read channel of a storage device controller is able to operate nominally at the baud rate by recognizing and compensating for oversampling and undersampling conditions. The read channel includes a sample rate converter for interpolating between digitally sampled values and a digital timing recovery loop that detects a phase error in the interpolated signal and adjusts the interpolation interval accordingly. An accumulator circuit generates a modulo-TS interpolation interval value, where TS is the sampling period. Detection circuitry detects when the interpolation interval value has wrapped through its maximum value or minimum value and generates an oversampling or undersampling signal in response. The oversampling and underampling signals are received by an elastic buffer.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics, N.V.
    Inventors: Jason Byrne, Thomas Conway
  • Patent number: 6332205
    Abstract: A data recovery system wherein the data is represented by a sequence of data pulses comprising a predetermined sequence of preamble pulses followed by the sequence of data pulses. The data pulses have desired data pulses and a DC offset component, each one of such data pulses having during the preamble acquisition mode a predetermined period. The system includes a clock for producing clock pulses at a predetermined rate and a negative feedback loop. The negative feedback loop includes a differencing network fed by the data pulses and a feedback signal representative of the DC offset component. The differencing network removes the DC offset component from the data pulses to produce output signal representative of the desired data pulses.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: December 18, 2001
    Assignee: STMicroelectronics N.V.
    Inventor: Thomas Conway
  • Patent number: 6249395
    Abstract: A data recovery system wherein the data is represented by a sequence of preamble pulses having a predetermined sequence followed by data pulses. An analog to digital converter converts samples of the preamble pulses and the data pulses into corresponding digital words in response to clock pulses fed to a clock input of the converter. A pair of feedback loops is coupled to an output of the analog to digital converter to produce the clock pulses for the converter; a first one during a data recovery mode and a second one during a preceding preamble acquisition mode.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: June 19, 2001
    Assignee: STMicroelectronics, N.V.
    Inventor: Thomas Conway
  • Patent number: 5458260
    Abstract: The invention pertains to a modular display for merchandising tubular cartridges containing adhesives, caulks, sealants or similar flowable elastomeric materials, where each cartridge contains a narrow dispensing nozzle at one end of the cartridge. The modular display unit comprises structural means for automatically aligning the cartridges horizontally and orientating the nozzles forwardly while stacking the cartridges in vertical rows by gravity feed. The internal structure includes a slotted front panel where the slot engages the narrowed nozzles but prevents passage of the enlarged tube end of the cartridge. The display unit enables the consumer to remove cartridges from the bottom and to reinsert cartridges at the top along with maintaining the intended forward orientation and horizontal alignment in the vertically stacked cartridges.
    Type: Grant
    Filed: April 25, 1994
    Date of Patent: October 17, 1995
    Assignee: The Glidden Company
    Inventors: Anthony Sainato, Thomas Conway, Scott Padiak