Abstract: A method and system for mask pattern correction are disclosed. A portion of a mask pattern is segmented into segments (22) that include a base segment (22a) and a relational segment (22b). The relational segment (22b) is matched with the base segment (22a). A proximity correction is determined for the base segment (22a), and a critical dimension correction is determined for the relational segment (22b). The critical dimension correction is determined with respect to the proximity correction of the matching base segment (22a).

Abstract: A communication system is desccribed which comprises a transmitter which transmits a standard broadcast format with an associated text string and a receiver for the reception and processing of the standard broadcast format and associated text string. The associated text string has close caption text in addition to other program or station specific text. The other program or station specific text is separated from the associated text string, decoded, processed and stored in function specific memories. When one changes a channel, or presses a button on a remote or has programmed in specific information requested, the program or station specific text is displayed. This text may be displayed on the televison screen with the picture, or it may be displayed on a separate display.

Abstract: An on-chip analog capacitor. Metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.

Abstract: An on-chip analog capacitor. Metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.

Abstract: An integrated circuit having improved soft error protection and a method improving the soft error protection of an integrated circuit are disclosed. The integrated circuit comprises a substrate 72, a transistor formed in the substrate 72, a first region 74 (e.g. a well) formed in the substrate having a first conductivity type, a second region 84 below the first region 74 having a second conductivity type, and a trench formed in the substrate having a depth at least substantially as deep as the well. The trench 70 is filled with a non-conductive material 71 that forms a frame around the transistor, whereby soft errors due to electron-hole pairs caused by ionizing radiation in the frame are substantially eliminated.

Abstract: An improvement to the optical proximity correction process used in photolithography. Mask pattern modeling is added to the optical proximity correction process, producing patterns that are optimized for both reticle manufacture and wafer fabrication. Pattern validation is improved by applying a mask pattern model and a wafer pattern model to the validation process. Reticle inspection is improved by adding a mask inspection tool model that comprehends the limitations of the inspection tool.

Abstract: A system for fabricating a mixed voltage integrated circuit is disclosed in which a gate is provided that contains a gate oxide and a gate conductor on a substrate. A first mask is deposited to pattern the length of the gate by etching, and a second mask pattern is deposited and used to etch the width of the gate, with or without a hard mask.

Abstract: An absolute time scale clock includes a radioactive isotope and a computer. The computer includes a processor that determines an indication of the current absolute time and a memory that stores a decay constant of the radioactive isotope, a reference time, and an amount of the isotope at the reference time. A energy supply that provides power to the computer. The absolute time scale clock further includes a detector positioned to respond to emissions from the radioactive isotope. The detector generates an indication of the number of emissions over a time interval that varies with the decay rate of the isotope. The processor is responsive to the indication from the detector, the decay constant, the reference time, and the reference amount to determine the indication of current absolute time.

Abstract: A method for evaluating a mask pattern for a product that is manufactured by a process that is described at least in part by a mathematical process model includes the steps of: (a) selecting a reference locus; (b) determining a sampling direction from the reference locus; (c) selecting a sampling locus in the sampling direction; (d) evaluating a model factor at the sampling locus; and (e) applying at least one predetermined criterion to the model factor to determine a conclusion. If the conclusion is a first inference, (f) repeating steps (c) through (e). If the conclusion is a second inference, (g) determining whether the evaluation is complete and repeating steps (a) through (g) until the evaluating is complete.

Abstract: A method of performing and verifying an integrated circuit layout is provided that comprises the steps of performing the layout of a mask. Proximity correction techniques are then applied to the mask layout data. Theoretical contours which comprise curvilinear forms are then extrapolated from the corrected mask data set. The curvilinear contour data is then bounded using boxing algorithms in order to generate a bounded contour data set. The bounded contour data set can then be compared to the original input mask data to detect design rule violations and other characteristics of the original layout.

Abstract: A method and system for mask pattern correction are disclosed. A portion of a mask pattern is segmented into segments (22) that include a base segment (22a) and a relational segment (22b). The relational segment (22b) is matched with the base segment (22a). A proximity correction is determined for the base segment (22a), and a critical dimension correction is determined for the relational segment (22b). The critical dimension correction is determined with respect to the proximity correction of the matching base segment (22a).

Abstract: An integrated circuit having improved soft error protection and a method improving the soft error protection of an integrated circuit are disclosed. The integrated circuit comprises a substrate 72, a transistor formed in the substrate 72, a first region 74 (e.g. a well) formed in the substrate having a first conductivity type, a second region 84 below the first region 74 having a second conductivity type, and a trench formed in the substrate having a depth at least substantially as deep as the well. The trench 70 is filled with a non-conductive material 71 that forms a frame around the transistor, whereby soft errors due to electron-hole pairs caused by ionizing radiation in the frame are substantially eliminated.

Abstract: An integrated circuit having improved soft error protection and a method improving the soft error protection of an integrated circuit are disclosed. The integrated circuit comprises a substrate 72, a transistor formed in the substrate 72, a first region 74 (e.g. a well) formed in the substrate having a first conductivity type, a second region 84 below the first region 74 having a second conductivity type, and a trench formed in the substrate having a depth at least substantially as deep as the well. The trench 70 is filled with a non-conductive material 71 that forms a frame around the transistor, whereby soft errors due to electron-hole pairs caused by ionizing radiation in the frame are substantially eliminated.

Abstract: An absolute time scale clock includes a radioactive isotope and a computer. The computer includes a processor that determines an indication of the current absolute time and a memory that stores a decay constant of the radioactive isotope, a reference time, and an amount of the isotope at the reference time. A energy supply that provides power to the computer. The absolute time scale clock further includes a detector positioned to respond to emissions from the radioactive isotope. The detector generates an indication of the number of emissions over a time interval that varies with the decay rate of the isotope. The processor is responsive to the indication from the detector, the decay constant, the reference time, and the reference amount to determine the indication of current absolute time.

Abstract: A method of performing and verifying an integrated circuit layout is provided that comprises the steps of performing the layout of a mask. Proximity correction techniques are then applied to the mask layout data. Theoretical contours which comprise curvilinear forms are then extrapolated from the corrected mask data set. The curvilinear contour data is then bounded using boxing algorithms in order to generate a bounded contour data set. The bounded contour data set can then be compared to the original input mask data to detect design rule violations and other characteristics of the original layout.

Abstract: An on-chip analog capacitor. Metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.

Abstract: An improvement to the optical proximity correction process used in photolithography. Mask pattern modeling is added to the optical proximity correction process, producing patterns that are optimized for both reticle manufacture and wafer fabrication. Pattern validation is improved by applying a mask pattern model and a wafer pattern model to the validation process. Reticle inspection is improved by adding a mask inspection tool model that comprehends the limitations of the inspection tool.

Abstract: Testing an Integrated circuit (420) for performance during exposure to an ion beam. Ion beams of atoms with atomic weights in the range of 6 to 20 impinging on an integrated circuit simulate the effects of cosmic ray neutrons interacting with silicon atoms of the integrated circuit.

Abstract: Memory chips with data memory (202), embedded logic (206) and broadcast memory (204) for two modes of operation are disclosed. A first mode of operation is the usual memory mode expected of a data RAM. The second mode of operation allows localized computation and/or processing of the data in data memory (202) by the embedded logic (206) with minimal handshaking with a remote CPU. In a functioning system, the memory chips are organized in a hierarchical manner and include address-associative memory systems.

Abstract: A flash waveform analyzer (10) includes a transmission line (12) for propagating a signal from an input (14). The transmission line (12) contains a plurality of samplers (16) located at different points along the transmission line (12). Each sampler (16) is activated by a strobe pulse from a strobe source (18) in order to measure a characteristic of the signal at the different points along the transmission line (12). The propagation velocity of the signal is made slower than the propagation velocity of the strobe pulse by using a different dielectric constant in the transmission line (12) than that of the strobe delay line (17). The characteristic measured by each sampler (16) is sent to a multiplexer (20) that selectively outputs the measured characteristic from each sampler (16) to an analog-to-digital converter (22) for processing and subsequent analysis.