Abstract: Method and apparatus for spatially optimizing the arrangement of surface mount pads on a ball grid array package. An array containing T surface mount pads with a diameter less than or equal to 0.4 millimeter is arranged in an array of rows and columns less than or equal to 0.5 millimeters center-to-center. The array of pads is subdivided into N groups of pads respectively numbered Gx (for X from 1 to N), each group containing Px pads (for X from 1 to N). Each pad in each group is located so as to maximize the number of empty spaces Sz that are adjacent to each pad, where Sz=(Gx?1). The number of fanout possibilities for each group (Px*Sz) is calculated, and then the total number of fanout possibilities, FP, is calculated using the function ?1N (Px*Sz). The resulting spatially optimized pattern has a quality score, FP/T, that is equal to or greater than 2.

Abstract: Method and apparatus for spatially optimizing the arrangement of surface mount pads on a ball grid array package. An array containing T surface mount pads with a diameter less than or equal to 0.4 millimeter is arranged in an array of rows and columns less than or equal to 0.5 millimeters center-to-center. The array of pads is subdivided into N groups of pads respectively numbered Gx (for X from 1 to N), each group containing Px pads (for X from 1 to N). Each pad in each group is located so as to maximize the number of empty spaces Sz that are adjacent to each pad, where Sz=(Gx?1). The number of fanout possibilities for each group (Px*Sz) is calculated, and then the total number of fanout possibilities, FP, is calculated using the function ?1N (Px*Sz). The resulting spatially optimized pattern has a quality score, FP/T, that is equal to or greater than 2.

Abstract: A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.

Abstract: A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.

Abstract: A method for shielding one or more circuits (21, 21?) of a printed circuit board includes depositing a layer of dielectric material (43) over a printed circuit board substrate (22) and the printed circuits (21, 21?), creating a trench-like opening (44) in the dielectric layer (43) such that the trench-like opening (44) surrounds the one or more circuits (21, 21?) to be shielded, depositing a layer of metal (27) over the layer of dielectric material (43) and within the trench-like openings (44), creating a solder pad (24) at each location where an electrical connection is to be made to the printed circuits (21, 21?) by removing a border of the metal layer (27) surrounding each connection location, and providing a microvia (25) through each solder pad (24) penetrating the dielectric layer (43) and terminating at the metal of the printed circuit (21, 21?).

Abstract: Methods for forming a metal shield on a printed circuit board (10) include depositing a first layer of metal (41) on a substrate (22) of the printed circuit board (10), depositing a first layer of dielectric material (42) on the first layer of metal (41), printing one or more circuits (21, 21?) on the first dielectric layer (42), depositing a second layer of dielectric material (43) over the one or more printed circuits (21, 21?), forming a trench-like opening (44) in the two layers of dielectric material (42, 43) surrounding the one or more printed circuits (21, 21?) so that the metal of the first layer (41) is exposed by the trench-like opening (44), depositing a second layer of metal (27) on the second layer of dielectric material (43) such that the second layer of metal (27) plates the trench-like opening (44) and makes electrical contact with the first metal layer (41).

Abstract: A method of forming a coaxial transmission line on a high density PCB. A metal layer (102) on the PCB (104) forms the bottom part of the shield, and is covered by a first dielectric (112). Two parallel trenches (122) are formed in the first dielectric to reveal part (123) of the metal strip. The signal conductor (132) is then formed on the first dielectric. A second dielectric (142) covers the signal conductor and the first dielectric. A second set of two parallel trenches (172) are formed in the second dielectric immediately above the first two trenches. Metal deposit (182) is plated in the parallel trenches to contact the metal strip, and also covers a portion of the second dielectric that lies between the trenches, to create a shield. The resulting coaxial transmission line has a center conductor insulated from the shield by the dielectrics.

Abstract: Methods and apparatus for forming a metal shield on a printed circuit board (10) include a layer of dielectric material (23) one or more printed circuits (21) on the layer of dielectric material (23), a layer of metal (27) on the layer of dielectric material (23), a metal-clad trench or opening surrounding the printed circuit (44) and electrically connected to the layer of metal(27), a solder pad (24) on the layer of dielectric material (23), a microvia (25) through the solder pad (24) and the layer of dielectric material (23), and electrical components (11) soldered to the solder pads (24) and to the printed circuit (21).

Abstract: Methods and apparatus for forming a metal shield on a printed circuit board (10) include a layer of dielectric material (23) one or more printed circuits (21) on the layer of dielectric material (23), a layer of metal (27) on the layer of dielectric material (23), a metal-clad trench or opening surrounding the printed circuit (44) and electrically connected to the layer of metal(27), a solder pad (24) on the layer of dielectric material (23), a microvia (25) through the solder pad (24) and the layer of dielectric material (23), and electrical components (11) soldered to the solder pads (24) and to the printed circuit (21).

Abstract: Methods and apparatus for forming a metal shield on a printed circuit board (10) include a layer of dielectric material (23) one or more printed circuits (21) on the layer of dielectric material (23), a layer of metal (27) on the layer of dielectric material (23), a metal-clad trench or opening surrounding the printed circuit (44) and electrically connected to the layer of metal (27), a solder pad (24) on the layer of dielectric material (23), a microvia (25) through the solder pad (24) and the layer of dielectric material (23), and electrical components (11) soldered to the solder pads (24) and to the printed circuit (21).

Abstract: A high density multi-layer printed circuit board (100) is formed by building additional dielectric and metallization layers over a central core (110) of conventional PCB laminate construction. The central core has a metallization pattern (113, 114) on at least one surface. A photoimaged dielectric layer (130) is deposited on one side of the central core and overlies the metallization pattern. Vias (136) are formed in this dielectric layer by a photoimaging process, and an additional metallization pattern (133) on this layer is electrically connected to the underlying metallization pattern through these vias. A non-photoimageable dielectric layer (120) is deposited on the other side of the central core. Vias (126) are formed in this dielectric layer by a laser drilling process, and an additional metallization pattern (123) on this layer is electrically connected to an underlying metallization pattern through these laser drilled vias.

Abstract: A flat panel display (10) uses active matrix addressing. Two parallel substrates (20, 30) have an organic electroluminescent medium (40) that emits visible light in response to an electrical signal, sandwiched between them. The top substrate is transparent to allow emitted light (50) to be discernible to an observer. The bottom substrate does not need to be transparent, as the active matrix display operates in a emissive or reflective mode. An array of electrodes (22) is situated on an inside face of the bottom substrate, and a transparent electrode (32) corresponding to the array is situated on an inside face of the top substrate. The electrodes serve to define an array of pixels. A number of switches (24) are located on the backside of the bottom substrate, and are each connected to respective electrodes (22) by an electrically conductive via (28) in the bottom substrate.

Abstract: A liquid crystal display device is made with plastic substrates (#1) and has an isotropic, non-birefringent polynorbornene alignment layer (#4) formed over an electrode pattern (#2). This isotropic, non-birefringent polynorbornene alignment layer also functions as a moisture barrier to prevent degradation of the liquid crystal fluid. No additional moisture barrier layers are needed.

Abstract: A method of forming a coaxial transmission line on a high density PCB. A metal strip (102) on the PCB (104) forms the bottom part of the shield, and is covered by a first dielectric (112). Two parallel trenches (122) are formed in the first dielectric to reveal part (123) of the metal strip. The signal conductor (132) is then formed on the first dielectric. A second dielectric (142) covers the signal conductor and the first dielectric. A second set of two parallel trenches (172) are formed in the second dielectric immediately above the first two trenches. Metal (182) is plated in the parallel trenches to contact the metal strip, and also covers a portion of the second dielectric that lies between the trenches, to create a shield. The resulting coaxial transmission line has a center conductor insulated from the shield by the dielectrics.

Abstract: A communication device is designed to contain the lowest possible level of toxic or hazardous materials, so that when it is eventually disposed of, it will not harm the environment and can be safely recycled. Each component A.sub.1, A.sub.2, . . . , A.sub.n in the communication device has a calculated Component Toxicity Index value. A Product Toxicity Index for the entire communication device is calculated by summing the individual Component Toxicity Index values. The desired outcome is a communication device having a Product Toxicity Index less than or equal to 100. The resulting communication device is referred to as "environmentally friendly". The communication device may be a two-way radio (10), and some of the components are a radio transmitter (12), a radio receiver (14), an antenna (16), an amplifier (18), a battery (20) and a housing (22).

Abstract: A method of creating high density interlayer interconnects on circuit carrying substrates. A circuit pattern (20) is formed on one side of a substrate (10), and gold balls (30) are selectively placed on the circuit pattern using a thermosonic ball bonder. A liquid solution of a polymer is cast directly on the substrate and the etched circuit pattern such that only the upper portion of each gold ball is revealed when the liquid polymer solution is then dried and cured to form a dry film (40). A second layer of metal is then deposited directly on the dry film, such that it is electrically and mechanically connected to the exposed top of the gold balls. A second circuit pattern (50) is then formed in the second layer of metal. The resulting high density interconnect has two circuit layers separated by a dielectric layer. Each circuit layer is connected to the other by the gold balls that serve as conductive vias.

Abstract: The driving voltage of a liquid crystal display can be adjusted by irradiating the liquid crystal fluid in the display with ultraviolet light. After the fluid is placed in the display, it is exposed to a predetermined dose of high intensity ultraviolet light. The ultraviolet light alters the chemical composition of the fluid, thus changing the switching voltage of the fluid and the driving voltage of the display.

Abstract: A method of creating high density interlayer interconnects on circuit carrying substrates. A circuit pattern (20) is formed on one side of a substrate (10), and gold balls (30) are selectively placed on the circuit pattern using a thermosonic ball bonder. A liquid solution of a polymer is cast directly on the substrate and the etched circuit pattern such that only the upper portion of each gold ball is revealed when the liquid polymer solution is then dried and cured to form a dry film (40). A second layer of metal is then deposited directly on the dry film, such that it is electrically and mechanically connected to the exposed top of the gold balls. A second circuit pattern (50) is then formed in the second layer of metal. The resulting high density interconnect has two circuit layers separated by a dielectric layer. Each circuit layer is connected to the other by the gold balls that serve as conductive vias.

Abstract: A liquid crystal display assembly (10) can function in either a transparent or reflective mode. The assembly consists of a reflective-type liquid crystal display cell (12) placed in front of an electrochromic panel (14). When a display driver (16) activates the electrochromic panel, it absorbs light. When the driver energizes segments (15) of the reflective-type liquid crystal display cell, they become reflective, providing a visual image to an observer. When the electrochromic panel is not activated by the driver, it is transparent or translucent, allowing the observer to see completely through the liquid crystal display assembly.

Abstract: A method of forming a high resolution metal pattern on a substrate. A temporary polyvinyl alcohol (10) layer underneath the photoresist layer (20) aids in removing the photoresist layer after plating. The photoresist is photodelineated in conventional manner to form a pattern (40). During photodelineation, the developing process for the resist does not completely remove the PVA (45) that lies directly under the removed resist, but instead reveals those portions of the polyvinyl alcohol layer. The substrate is then rinsed in a hot aqueous solution to effect removal of the revealed PVA portions, now exposing portions (40) of the substrate (15). Metal (50) is then electroplated to build up a metal circuitry pattern. The remaining portions of the photoresist and the PVA are then removed by a hot aqueous solution.