Patents by Inventor To V. Pham

To V. Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180143952
    Abstract: Provided are techniques for comparing similar applications. A feature is identified from a linkage table, wherein the linkage table comprises a link to first information and a link to second information describing the feature, wherein the first information is for a first application and the second information is for a second application. There is redirection from a first web page to a second web page in a Graphical User Interface (GUI) with a first window in the second web page displaying the first information and a second window in the second web page displaying the second information.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 24, 2018
    Inventors: Edward L. Bader, Nehemiah E. Clark, Bryan V. Pham, Ruben Salazar, JR.
  • Publication number: 20170272527
    Abstract: Distributing access to a document from a processing system includes sending or pushing a reference for a document within a repository to a storage area of a recipient system of a recipient to enable retrieval of the document from the repository. The reference is removed from the storage area of the recipient system of the recipient in response to an expiration of the document.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Edward L. Bader, Nehemiah E. Clark, David S. Gaskins, Adrian Hermosillo, Bryan V. Pham
  • Publication number: 20170272520
    Abstract: Distributing access to a document from a processing system includes sending or pushing a reference for a document within a repository to a storage area of a recipient system of a recipient to enable retrieval of the document from the repository. The reference is removed from the storage area of the recipient system of the recipient in response to an expiration of the document.
    Type: Application
    Filed: April 7, 2017
    Publication date: September 21, 2017
    Inventors: Edward L. Bader, Nehemiah E. Clark, David S. Gaskins, Adrian Hermosillo, Bryan V. Pham
  • Patent number: 9745191
    Abstract: An autothermal reforming catalytic structure for generating hydrogen gas from liquid hydrocarbons, steam and an oxygen source. The autothermal reforming catalytic structure includes a support structure and nanosized mixed metal oxide particles dispersed homogenously throughout the support structure.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: August 29, 2017
    Assignees: Saudi Arabian Oil Company, The University of Queensland
    Inventors: Thang V. Pham, Sai P. Katikaneni, Jorge N. Beltramini, Moses O. Adebajo, Joao Carlos Diniz Da Costa, Gao Qing Lu
  • Patent number: 9640469
    Abstract: A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array (310) designed for direct attachment to an array of integrated circuit die (306) by including a thermal interface adhesion layer (308) to each die (306) and encapsulating the attached heat spreader lid array (310) and array of integrated circuit die (306) with mold compound (321) except for planar upper lid surfaces of the heat spreader lids (312).
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: George R. Leal, Tim V. Pham
  • Publication number: 20160369625
    Abstract: A system and method for magnetic survey uses an autonomous vehicle configured to traverse over the area in a grid pattern with a magnetometer coupled to the autonomous vehicle and configured to obtain magnetic measurements at a controlled rate, the magnetometer obtaining a uniform sampling of the magnetic measurements in each grid of the grid pattern; and a processor configured to obtain the magnetic survey based on the magnetic measurements.
    Type: Application
    Filed: June 22, 2016
    Publication date: December 22, 2016
    Inventors: Khalid SOOFI, Avinash RAMJIT, Son V. PHAM, Stefan MAUS
  • Patent number: 9480161
    Abstract: A low profile strip dual in-line memory module (200) includes a passive interposer support structure (90) with patterned openings (91-97) formed between opposing top and bottom surfaces, a plurality of memory chips (D1-D8) attached to the top and bottom surfaces, and vertical solder ball conductors (98) extending through the patterned openings to electrically connect the plurality of memory chips, where each memory chip has an attachment surface facing the passive interposer structure and a patterned array of horizontal conductors (e.g., 82-86) formed on the attachment surface with contact pads electrically connected to the plurality of vertical conductors to define at least one bus conductor that is electrically connected to each memory die in the first and second plurality of memory die.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: October 25, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Perry H. Pelley, Michael B. McShane, Tim V. Pham
  • Publication number: 20160214859
    Abstract: An autothermal reforming catalytic structure for generating hydrogen gas from liquid hydrocarbons, steam and an oxygen source. The autothermal reforming catalytic structure includes a support structure and nanosized mixed metal oxide particles dispersed homogenously throughout the support structure.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Applicants: Saudi Arabian Oil Company, University of Queensland
    Inventors: Jorge N. Beltramini, Moses O. Adebajo, Joao Carlos Diniz Da Costa, Gao Qing Lu, Thang V. Pham, Sai P. Katikaneni
  • Publication number: 20160214090
    Abstract: An autothermal reforming catalytic structure for generating hydrogen gas from liquid hydrocarbons, steam and an oxygen source. The autothermal reforming catalytic structure includes a support structure and nanosized mixed metal oxide particles dispersed homogenously throughout the support structure.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Applicants: Saudi Arabian Oil Company, University of Queensland
    Inventors: Jorge N. Beltramini, Moses O. Adebajo, Joao Carlos Diniz Da Costa, Gao Qing Lu, Thang V. Pham, Sai P. Katikaneni
  • Publication number: 20160214089
    Abstract: An autothermal reforming catalytic structure for generating hydrogen gas from liquid hydrocarbons, steam and an oxygen source. The autothermal reforming catalytic structure includes a support structure and metal particles dispersed homogenously throughout the support structure.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Applicants: Saudi Arabian Oil Company, University of Queensland
    Inventors: Jorge N. Beltramini, Moses O. Adebajo, Joao Carlos Diniz Da Costa, Gao Qing Lu, Thang V. Pham, Sai P. Katikaneni
  • Publication number: 20160214091
    Abstract: An autothermal reforming catalytic structure for generating hydrogen gas from liquid hydrocarbons, steam and an oxygen source. The autothermal reforming catalytic structure includes a support structure and nanosized mixed metal oxide particles dispersed homogenously throughout the support structure.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 28, 2016
    Applicants: Saudi Arabian Oil Company, University of Queensland
    Inventors: Jorge N. Beltramini, Moses O. Adebajo, Joao Carlos Diniz Da Costa, Gao Qing Lu, Thang V. Pham, Sai P. Katikaneni
  • Publication number: 20160118095
    Abstract: The dies of a stacked die integrated circuit (IC) employ the address bus to indicate the particular die, or set of dies, targeted by data on a data bus. During manufacture of the stacked die IC, the IC is programmed with information indicating a width of the address bus. During operation, each die addresses the other dies with addresses having the corresponding width based on this programmed information.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 28, 2016
    Inventors: Perry H. Pelley, Michael B. McShane, Tim V. Pham
  • Patent number: 9318451
    Abstract: A first semiconductor device die is provided having a bottom edge incorporating a notch structure that allows sufficient height and width clearance for a wire bond connected to a bond pad on an active surface of a second semiconductor device die upon which the first semiconductor device die is stacked. Use of such notch structures reduces a height of a stack incorporating the first and second semiconductor device die, thereby also reducing a thickness of a semiconductor device package incorporating the stack.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: April 19, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Tim V. Pham, Michael B. McShane, Perry H. Pelley, Tab A. Stephens
  • Patent number: 9281256
    Abstract: A microelectronic device package including a package substrate, microelectronic component disposed on a first surface of a first portion of the substrate, and encapsulant material surrounding the microelectronic electronic component. An exposed surface of the first portion of the substrate is exposed through an opening in a first major surface of the encapsulant material. The exposed surface of the first portion has an edge. Encapsulant material is adjacent to the edge at the first major surface. The exposed surface is opposite the first surface. A stress relief feature located in one of the first major surface or a second major surface of the encapsulant material. The second major surface is opposite the first major surface. The stress relief feature reduces an amount of the encapsulant material and is 1 mm or less of a plane of the edge of the exposed surface. The plane is generally perpendicular to the exposed surface.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 8, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Min Ding, Tim V. Pham
  • Patent number: 9263100
    Abstract: A bypass system and method that mimics read timing of a memory system which includes a self-timing circuit and a sense amplifier. When prompted, the self-timing circuit initiates the sense amplifier to evaluate its differential input. The bypass system includes a memory controller that is configured to provide a bypass enable, to prompt the self-timing circuit, and to disable normal read control when a bypass read operation is indicated. A bypass latch latches an input data value, converts the input data value into an input complementary pair, and provides the complementary pair to the differential input of the sense amplifier. The sense amplifier, when initiated, evaluates the input complementary pair after its self-timing period and provides an output data value. The bypass latch and self-timing circuit may operate synchronous with a read clock in a read domain of the memory for more accurate memory read timing.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: February 16, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Bradley J. Garni, Huy Van V. Pham, Glenn E. Starnes, Mark Jetton, Thomas W. Liston
  • Publication number: 20160016931
    Abstract: Compounds are provided that can exhibit anti-cancer and/or anti-inflammatory properties, in some aspects, methods of treating an inflammatory disease or a hyperproliferative disease, such as cancer, with the compounds are provided.
    Type: Application
    Filed: March 13, 2014
    Publication date: January 21, 2016
    Inventors: Richard J. FORD, Jr., William G. BORNMANN, Ashutosh PAL, Lan V. PHAM, Zhenghong PENG, David MAXWELL, Archito TAMAYO
  • Publication number: 20160005682
    Abstract: A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array (310) designed for direct attachment to an array of integrated circuit die (306) by including a thermal interface adhesion layer (308) to each die (306) and encapsulating the attached heat spreader lid array (310) and array of integrated circuit die (306) with mold compound (321) except for planar upper lid surfaces of the heat spreader lids (312).
    Type: Application
    Filed: September 10, 2015
    Publication date: January 7, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: George R. Leal, Tim V. Pham
  • Patent number: 9159643
    Abstract: A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array (310) designed for direct attachment to an array of integrated circuit die (306) by including a thermal interface adhesion layer (308) to each die (306) and encapsulating the attached heat spreader lid array (310) and array of integrated circuit die (306) with mold compound (321) except for planar upper lid surfaces of the heat spreader lids (312).
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: October 13, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George R. Leal, Tim V. Pham
  • Publication number: 20150287653
    Abstract: The dies of a stacked die IC are tested and, in response to detection of a defect at one of the dies, the type of defect is identified. If the defect is identified as a defective module repairable at the die itself, a redundant module of the die is used to replace the functionality of the defective module. If the defect is identified as one that is not repairable, a replacement die in the die stack is used to replace the functionality of the defective die.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 8, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Perry H. Pelley, Michael B. McShane, Tim V. Pham
  • Publication number: 20150204728
    Abstract: Systems, methods and other embodiments associated with spatial-domain Low-coherence Quantitative Phase Microscopy (SL-QPM) are described herein. SL-QPM can detect structural alterations within cell nuclei with nanoscale sensitivity (0.9 nm) (or nuclear nano-morphology) for “nano-pathological diagnosis” of cancer. SL-QPM uses original, unmodified cytology and histology specimens prepared with standard clinical protocols and stains. SL-QPM can easily integrate in existing clinical pathology laboratories. Results quantified the spatial distribution of optical path length or refractive index in individual nuclei with nanoscale sensitivity, which could be applied to studying nuclear nano-morphology as cancer progresses. The nuclear nano-morphology derived from SL-QPM offers significant diagnostic value in clinical care and subcellular mechanistic insights for basic and translational research. Techniques that provide for depth selective investigation of nuclear and other cellular features are disclosed.
    Type: Application
    Filed: December 5, 2014
    Publication date: July 23, 2015
    Applicant: University of Pittsburgh - Of the Commonwealth System of Higher Education
    Inventors: Yang Liu, Randall E. Brand, Hoa V. Pham, Shikhar Fnu