Patents by Inventor Tohru Okabe

Tohru Okabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11107845
    Abstract: A Thin Film Transistor (TFT) substrate includes a first semiconductor film, a first electrically conductive member provided in a layer higher than the first semiconductor film, an interlayer insulating film provided in a layer higher than the first electrically conductive member and including a first through hole, a second semiconductor film provided in a layer higher than the interlayer insulating film, a second electrically conductive member provided in a layer higher than the second semiconductor film, an organic insulating film provided in a layer higher than the second electrically conductive member and including a second through hole, and a third electrically conductive member provided in a layer higher than the organic insulating film. A contact hole extends through the first and the second through hole to the first electrically conductive member.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: August 31, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Yaneda
  • Publication number: 20210257579
    Abstract: A display area is provided with a plurality of first conductive layers formed of the same material and in the same layer as first electrodes. The first conductive layers are each positioned under a corresponding one of plurality of first photo spacers. A frame area is provided with a second conductive layer formed of the same material and in the same layer as the first electrodes. The second conductive layer includes a plurality of openings each formed under a corresponding one of a plurality of second photo spacers.
    Type: Application
    Filed: August 23, 2018
    Publication date: August 19, 2021
    Inventors: TOHRU OKABE, TAKESHI YANEDA
  • Publication number: 20210225881
    Abstract: An active matrix substrate including a resin substrate including a plurality of external connection terminals arranged near a display region, the active matrix substrate includes: a plurality of first lead wires each extending from one of the external connection terminals to the display region; and a plurality of second lead wires each extending from one of the external connection terminals to a separation line, the second lead wires being arranged with an arrangement pitch along the separation line, and the arrangement pitch of the second lead wires being greater than an arrangement pitch of the first lead wires.
    Type: Application
    Filed: August 23, 2018
    Publication date: July 22, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINJI ICHIKAWA, SHINSUKE SAIDA, SHOJI OKAZAKI, TOKUO YOSHIDA, HIROKI TANIYAMA, KOHJI ARIGA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA, YOSHIHIRO KOHARA, KOJI TANIMURA
  • Publication number: 20210210583
    Abstract: In a TFT layer provided on a base substrate, a first metal film, a first inorganic insulating film, a second metal film, a second inorganic insulating film, a third metal film, a first flattening film, a fourth metal film, and a second flattening film are sequentially layered. In a frame region, a slit is formed in the second flattening film to surround a display region, a first conductive layer formed by the fourth metal film is provided on the first flattening film exposed from the slit, and a TFT of a drive circuit is provided on the base substrate side of the first conductive layer to overlap with the first conductive layer.
    Type: Application
    Filed: May 22, 2018
    Publication date: July 8, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, KOHJI ARIGA, HIROKI TANIYAMA, SHINJI ICHIKAWA, SHINSUKE SAIDA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO KOHARA, KOJI TANIMURA, YOSHIHIRO NAKADA
  • Patent number: 11028270
    Abstract: [Problem] To provide a composition for a black matrix which is a material suitable for manufacturing a black matrix, which is suitable for a high luminance display device structure and has high heat resistance and high light-shielding properties. [Means for Solution] The present invention uses a composition for a black matrix comprising: (I) a black colorant containing carbon black having a volume average particle diameter of 1 to 300 nm; (II) a siloxane polymer to be obtained by hydrolyzing and condensing a silane compound represented by a prescribed formula in the presence of an acidic or basic catalyst; (III) surface modified silica fine particles; (IV) a thermal base generator; and (V) a solvent.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: June 8, 2021
    Assignee: Merck Patent GmbH
    Inventors: Hirohiko Nishiki, Tohru Okabe, Izumi Ishida, Shogo Murashige, Atsuko Noya, Toshiaki Nonaka, Naofumi Yoshida
  • Patent number: 11024656
    Abstract: An active matrix substrate in which step-caused disconnection of a metal film in a contact hole does not easily occur includes a first to third insulating films and first to third metal films on a glass substrate and a contact hole electrically connecting the first and second metal film, the contact hole including first to third hole present respectively in the first to third insulating films, the first and third metal films being in contact with each other inside the first hole, the second insulating film and an oxide semiconductor film overlapping with each other in a region below the third hole, the second and third metal films being in contact with each other in a region above the first insulating film and either inside or below the third hole.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: June 1, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Yaneda
  • Patent number: 11018214
    Abstract: A display device includes a resin substrate, a TFT layer, a light-emitting element, a frame region, a terminal portion, a bending portion, a plurality of frame wiring lines, and at least a one-layer inorganic film. The light-emitting element includes a metal electrode provided on a flattening film included in the TFT layer. In the bending portion, an opening is formed in at least the one-layer inorganic film. A frame flattening film is provided to fill the opening. The plurality of frame wiring lines are provided on the frame flattening film across the opening. The frame wiring line is formed of a metal material identical to the metal material of the metal electrode. The frame flattening film is formed of a resin material identical to the resin material of the flattening film.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: May 25, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Hiroki Taniyama, Shinsuke Saida, Hiroharu Jinmura, Yoshihiro Nakada, Akira Inoue
  • Patent number: 10991729
    Abstract: An active matrix substrate having low susceptibility to contact failure between two conductor films is provided. An oxide semiconductor film converted into a conductor is provided in a layer between a substrate and a first metal film. Within a contact hole, the oxide semiconductor film converted into a conductor is in contact with a second metal film. Outside of the contact hole, the oxide semiconductor film converted into a conductor is in contact with the first metal film.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: April 27, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Yaneda
  • Publication number: 20210098559
    Abstract: Frame wiring lines are provided in a frame region, a flattening film in which a frame-shaped slit is formed in the frame region is provided in the display region and the frame region, a plurality of first electrodes constituting light-emitting elements are provided on the flattening film, and conductive layer made of the same material and formed in the same layer as those of each of the plurality of first electrodes are provided covering at least end faces of the frame wiring lines exposed from the slit.
    Type: Application
    Filed: March 30, 2018
    Publication date: April 1, 2021
    Inventors: HIROKI TANIYAMA, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA, TOHRU OKABE, KOHJI ARIGA, AKIRA INOUE, YOSHIHIRO KOHARA, KOJI TANIMURA, YOSHIHIRO NAKADA, HIROHARU JINMURA
  • Publication number: 20210083226
    Abstract: The disclosure has an object to achieve a high level of height precision for spacers on a back plane. A display device includes: edge covers having a plurality of openings in which first electrodes are exposed; and a planarization film having first flat portions, second flat portions, and contact holes. The plurality of openings respectively overlap the first flat portions in a plan view. The second flat portions are located between the plurality of openings in a plan view. Each edge cover overlapping one of the first flat portions in a plan view has, on a second electrode side, a surface that has a first height from a bottom surface of the planarization film on a substrate side. Each second flat portion has, on the second electrode side, a surface that has a second height from the bottom surface. The first height is smaller than the second height.
    Type: Application
    Filed: January 18, 2018
    Publication date: March 18, 2021
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, HIROKI TANIYAMA, SHINJI ICHIKAWA, RYOSUKE GUNJI, YOSHIHIRO NAKADA, AKIRA INOUE, HIROHARU JINMURA
  • Publication number: 20210066440
    Abstract: A slit has ends each close to one of a display area and a terminal. The ends are each formed of a stepwise side face, including etch stop films.
    Type: Application
    Filed: January 31, 2018
    Publication date: March 4, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, HIROKI TANIYAMA, SHINJI ICHIKAWA, TAKESHI YANEDA, HIROHARU JINMURA, YOSHIHIRO NAKADA, AKIRA INOUE
  • Publication number: 20210057512
    Abstract: In a display device, a second wiring line extends in a display region and includes an imaginary straight line that extends from the second wiring line in an extension direction of the second wiring line and intersects with an opening of an edge cover. The second wiring line extends along the peripheral edge of the opening without intersecting with the opening of the edge cover.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 25, 2021
    Inventors: RYOSUKE GUNJI, TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, KOHJI ARIGA, HIROKI TANIYAMA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, HIROHARU JINMURA, AKIRA INOUE
  • Publication number: 20210050395
    Abstract: In a display region, etching stopper layers are provided between a plurality of inorganic insulating films, openings are formed in the inorganic insulating films located closer to a light-emitting element than the etching stopper layers so as to expose the upper surfaces of the etching stopper layers, and flattening films are provided in the openings such that the openings are filed with the flattening films.
    Type: Application
    Filed: March 28, 2018
    Publication date: February 18, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINJI ICHIKAWA, KOHJI ARIGA, SHINSUKE SAIDA, HIROKI TANIYAMA, HIROHARU JINMURA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, AKIRA INOUE
  • Publication number: 20210036093
    Abstract: A first conductive layer in the same layer as that of a first electrode is coupled to a third conductive layer and a second electrode in the same layer as that of a third metal layer through a slit formed in a flattening film of a non-display area. Second conductive layers in the same layer as that of a second metal layer are provided to overlap with the slit.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 4, 2021
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, HIROKI TANIYAMA, RYOSUKE GUNJI, KOHJI ARIGA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, AKIRA INOUE, HIROHARU JINMURA, TAKESHI YANEDA
  • Publication number: 20210020689
    Abstract: In a display device, an inorganic insulating layer, a metal layer, a flattering film, a first electrode, an edge cover, a function layer, and a second electrode are formed, in that order, on a base substrate. The edge cover covers an edge of the first electrode and includes a first opening exposing the first electrode. The function layer is formed covering the first opening and an edge of the edge cover. The flattening film includes a first planar portion and a second planar portion having a film thickness smaller than that of the first planar portion, is configured to electrically connect the first electrode and the metal layer via a contact hole formed in the first planar portion, and overlaps the first opening of the edge cover at at least a portion of the second planar portion.
    Type: Application
    Filed: March 22, 2018
    Publication date: January 21, 2021
    Inventors: TOHRU OKABE, RYOSUKE GUNJI, SHINSUKE SAIDA, SHINJI ICHIKAWA, KOHJI ARIGA, HIROKI TANIYAMA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, HIROHARU JINMURA, AKIRA INOUE
  • Publication number: 20210020733
    Abstract: In the display device according to the disclosure, a first bank includes a first bank lower portion in the same layer as a flattening film and a first bank upper portion in the same layer as an edge cover. A second bank includes a second bank lower portion in the same layer as the flattening film and a second bank upper portion in the same layer as the edge cover. The first bank upper portion covers an upper surface and a side surface of the first bank lower portion, the side surface being on a side close to a display region. An inclination angle of a side surface of the first bank upper portion on a side close to the display region is larger than an inclination angle of the side surface of the first bank lower portion on the side close to the display region.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 21, 2021
    Inventors: SHINSUKE SAIDA, TOHRU OKABE, SHINJI ICHIKAWA, RYOSUKE GUNJI, HIROKI TANIYAMA, HIROHARU JINMURA, AKIRA INOUE, YOSHIHIRO NAKADA
  • Publication number: 20210013299
    Abstract: In a step of forming a plurality of control lines composed of a first metal layer a first metal layer branch line is formed. In a step of forming a plurality of power source lines composed of a second metal layer a second metal layer connecting portion is formed that connects each power source line with the first metal layer branch line via an opening of a first insulating film. In a step of forming a plurality of data signal lines composed of a third metal layer that is formed on a second insulating film the first metal layer branch line formed in the opening of the first insulating and the second metal layer connecting portion formed in an opening of the second insulating film are etched.
    Type: Application
    Filed: March 26, 2018
    Publication date: January 14, 2021
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, HIROKI TANIYAMA, RYOSUKE GUNJI, KOHJI ARIGA, YOSHIHIRO NAKADA, KOJI TANIMURA, YOSHIHIRO KOHARA, HIROHARU JINMURA, AKIRA INOUE
  • Publication number: 20210013297
    Abstract: The display device includes a non-display area. The non-display area includes: a slit formed in an edge cover; a first conductive layer formed in the same layer as an anode, and being in contact with a cathode; and a second conductive layer formed in the same layer as a capacitance electrode and provided to overlap the slit.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 14, 2021
    Inventors: TOHRU OKABE, SHINSUKE SAIDA, SHINJI ICHIKAWA, HIROKI TANIYAMA, RYOSUKE GUNJI, TAKESHI YANEDA, YOSHIHIRO NAKADA, HIROHARU JINMURA, AKIRA INOUE
  • Patent number: 10879064
    Abstract: Provided is a method for manufacturing a semiconductor device, the semiconductor device including a substrate, and an oxide semiconductor TFT that is supported by the substrate and includes an oxide semiconductor film as an active layer. The method includes: (A) preparing MO gas containing a first organometallic compound that contains In and a second organometallic compound that contains Zn; and (B) supplying gas containing the MO gas and oxygen to the substrate placed in a chamber under a condition in which the substrate is heated to 500° C. or lower, and growing an oxide semiconductor film containing In and Zn on the substrate using an MOCVD method. Step (B) is performed under a condition in which plasma is formed in the chamber.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 29, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Nakajima, Hirohiko Nishiki, Hirohide Mimura, Yuhichi Saitoh, Yujiro Takeda, Shogo Murashige, Izumi Ishida, Tohru Okabe
  • Publication number: 20200388668
    Abstract: A wiring line is provided on a TFT layer, in which the wiring line is formed in the same layer and formed of the same material as those of a reflection electrode. The reflection electrode includes a plurality of metallic conductive layers made up of a low resistance metallic material, an oxide-based lower transparent conductive layer provided on a lower surface side of a lowermost metallic conductive layer constituting a lowermost layer, an oxide-based upper transparent conductive layer having light reflectivity and provided on an upper surface side of an uppermost metallic conductive layer constituting an uppermost layer, and an oxide-based intermediate transparent conductive layer provided between the plurality of metallic conductive layers.
    Type: Application
    Filed: September 28, 2017
    Publication date: December 10, 2020
    Inventors: Tohru OKABE, Ryosuke GUNJI, Hiroki TANIYAMA, Shinsuke SAIDA, Hiroharu JINMURA, Yoshihiro NAKADA, Akira INOUE