Abstract: A semiconductor device comprises an insulation film that is provided on a semiconductor substrate, a first contact plug that is provided in the insulation film and includes a metal, a first adhesive film that is provided on the insulation film, has a higher oxygen affinity than the metal, and includes an oxide, a second adhesive film that is provided on the first contact plug and has a film thickness that is smaller than a film thickness of the first adhesive film, a first capacitor electrode that is provided on the contact plug and the first adhesive film, has a part in direct contact with the first contact plug, a capacitor insulation film that is provided on the first capacitor electrode, and a second capacitor electrode that is provided on the capacitor insulation film.

Abstract: A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.

Abstract: A semiconductor memory device includes a row of memory cells connected in series, each of the memory cells including a ferroelectric capacitor and a cell transistor having a gate terminal and source/drain terminals, the source/drain terminals being connected in parallel with two electrodes of the ferroelectric capacitor, a word line connected to the gate terminal, memory cell blocks each including the row of memory cells and a block select transistor, a drain terminal of the block select transistor being connected to one end of the row of memory cells, a plate line connected to another end thereof, a bit line connected to a source terminal of the block select transistor, and a block select line connected to a gate terminal of the block select transistor, wherein a contact is provided under the plate line to connect the source terminal of the block select transistor and the bit line.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate and including a first gate electrode and first and second diffusion layers, a first contact connected to the first diffusion layer, a first conductive oxygen barrier film electrically connected to the first contact and covering at least the upper surface of the first contact, a first ferroelectric capacitor including a first electrode, a second electrode, and a first ferroelectric film interposed between the first and second electrodes, and a first connecting member connected to the first electrode and to the first conductive oxygen barrier film.

Abstract: A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.

Abstract: A ferroelectric memory device includes a first trench formed in a semiconductor substrate and having a first depth, a second trench formed in the substrate and having a second depth, a first element isolation insulating film buried in the first trench, a first gate electrode formed in a lower region of the second trench, a first insulating film formed in an upper region of the second trench, first and second diffusion layers formed in the substrate on both side surface in the second trench, a first ferroelectric capacitor disposed on the first diffusion layer, a first contact disposed on the first ferroelectric capacitor, a first wiring layer disposed on the first contact, a second contact disposed on the second diffusion layer, and a second wiring layer disposed on the second contact and disposed in the same level as that of the first wiring layer.

Abstract: There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor substrate, the ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first hydrogen barrier film which continuously surrounds side portions of a ferroelectric capacitor cell array constituted of a plurality of ferroelectric capacitors, and a second hydrogen barrier film which is formed above the ferroelectric capacitor cell array and which is brought into contact with the first hydrogen barrier film in the whole periphery.

Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

Abstract: A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.

Abstract: A semiconductor device including a ferroelectric random access memory, which has a structure suitable for miniaturization and easy to manufacture, and having less restrictions on materials to be used, comprises a field effect transistor formed on a surface area of a semiconductor wafer, a trench ferroelectric capacitor formed in the semiconductor wafer in one source/drain of the field effect transistor, wherein one electrode thereof is connected to the source/drain, and a wiring formed in the semiconductor wafer and connected to the other electrode of the trench ferroelectric capacitor.

Abstract: A semiconductor storage device wherein a plurality of ferroelectric capacitors are sufficiently covered with a hydrogen barrier film formed thereon comprises a field effect transistor formed on one surface side of a semiconductor substrate, a plurality of ferroelectric capacitors formed close to each other above the field effect transistor, an insulting film configured to cover the plurality of ferroelectric capacitors and planarised a space between adjacent ferroelectric capacitors in a self-aligned manner during formation thereof, and a hydrogen barrier film formed on the insulating film.

Abstract: A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

Abstract: A transistor including a source/drain region is formed on a semiconductor substrate. A plug electrode is formed on the source/drain region. A conductive film is formed on the plug electrode. A first insulation film is formed on the conductive film. A lower electrode is formed on the first insulation film, and electrically connected to the conductive film formed on the plug electrode. A ferroelectric film is formed on the lower electrode. An upper electrode is formed on the ferroelectric film.

Abstract: A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.

Abstract: A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.

Abstract: A ferroelectric memory device includes a first trench formed in a semiconductor substrate and having a first depth, a second trench formed in the substrate and having a second depth, a first element isolation insulating film buried in the first trench, a first gate electrode formed in a lower region of the second trench, a first insulating film formed in an upper region of the second trench, first and second diffusion layers formed in the substrate on both side surface in the second trench, a first ferroelectric capacitor disposed on the first diffusion layer, a first contact disposed on the first ferroelectric capacitor, a first wiring layer disposed on the first contact, a second contact disposed on the second diffusion layer, and a second wiring layer disposed on the second contact and disposed in the same level as that of the first wiring layer.

Abstract: A first impurity diffusion area is formed in the semiconductor substrate at a bottom of the first trench formed in a surface of the semiconductor substrate. A second impurity diffusion area is formed in the surface of the semiconductor substrate, each have one end contacting a first side wall of the first trench, and each have the same conductive type as the first impurity diffusion area. A first gate electrode is provided on the first side wall between the first and second impurity diffusion areas with a gate insulating film interposed therebetween. A first ferroelectric film is provided on a first lower electrode, which is provided on the second impurity area. A first upper electrode is provided on the first ferroelectric film. A first interconnection layer is provided above the first upper electrode. A first contact plug electrically connects the first interconnection layer and first impurity diffusion area.

Abstract: A first impurity diffusion area is formed in the semiconductor substrate at a bottom of the first trench formed in a surface of the semiconductor substrate. A second impurity diffusion area is formed in the surface of the semiconductor substrate, each have one end contacting a first side wall of the first trench, and each have the same conductive type as the first impurity diffusion area. A first gate electrode is provided on the first side wall between the first and second impurity diffusion areas with a gate insulating film interposed therebetween. A first ferroelectric film is provided on a first lower electrode, which is provided on the second impurity area. A first upper electrode is provided on the first ferroelectric film. A first interconnection layer is provided above the first upper electrode. A first contact plug electrically connects the first interconnection layer and first impurity diffusion area.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate and including a first gate electrode and first and second diffusion layers, a first contact connected to the first diffusion layer, a first conductive oxygen barrier film electrically connected to the first contact and covering at least the upper surface of the first contact, a first ferroelectric capacitor including a first electrode, a second electrode, and a first ferroelectric film interposed between the first and second electrodes, and a first connecting member connected to the first electrode and to the first conductive oxygen barrier film.