Patents by Inventor Tomohiro Kawakubo

Tomohiro Kawakubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6809565
    Abstract: A semiconductor device that has the function of initializing an intern circuit. A starter sign generation circuit outputs a starter sign for initializing the intern circuit in the semiconductor device on the basis of input power supply voltage. A latch circuit holds and outputs the starter sign. A shutoff circuit shuts off input of the power supply voltage to the starter sign generation circuit when the starter sign is output. That is to say, the starter sign output on the basis of the power supply voltage is held by the latch circuit and the power supply voltage input to the starter sign generation circuit is shut off. As a result, consumption of power is reduced.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: October 26, 2004
    Assignee: Fujitsu Limited
    Inventor: Tomohiro Kawakubo
  • Publication number: 20040041602
    Abstract: A semiconductor device that has the function of initializing an intern circuit. A starter sign generation circuit outputs a starter sign for initializing the intern circuit in the semiconductor device on the basis of input power supply voltage. A latch circuit holds and outputs the starter sign. A shutoff circuit shuts off input of the power supply voltage to the starter sign generation circuit when the starter sign is output. That is to say, the starter sign output on the basis of the power supply voltage is held by the latch circuit and the power supply voltage input to the starter sign generation circuit is shut off. As a result, consumption of power is reduced.
    Type: Application
    Filed: March 24, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Tomohiro Kawakubo
  • Patent number: 6584032
    Abstract: An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: June 24, 2003
    Assignee: Fujitsu Limited
    Inventors: Shinya Fujioka, Tomohiro Kawakubo, Koichi Nishimura, Kotoku Sato
  • Patent number: 6563746
    Abstract: An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: May 13, 2003
    Assignee: Fujitsu Limited
    Inventors: Shinya Fujioka, Tomohiro Kawakubo, Koichi Nishimura, Kotoku Sato
  • Patent number: 6531914
    Abstract: An internal voltage generation circuit with a small area, which has many correction points and can provide an output voltage with a high precision, has been disclosed. In this internal voltage generation circuit, some resistors, among the resistors which are connected in series constituting the feedback circuit, have different resistance and transfer gates are provided in parallel to the resistors of different resistance. This configuration has a decode function and, therefore, the decoder can be eliminated and the number of sets of an inverter, a transfer gate, and a resistor can also be reduced, resulting in a reduction in area without a reduction in the number of the correction points.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: March 11, 2003
    Assignee: Fujitsu Limited
    Inventor: Tomohiro Kawakubo
  • Patent number: 6404221
    Abstract: A voltage detecting circuit includes a constant-voltage source, a load part including a first transistor coupled to the constant-voltage source, and a detecting part which is connected to the load part and includes a second transistor of the same type as that of the first transistor. The detecting part detects a given voltage applied thereto.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: June 11, 2002
    Assignee: Fujitsu Limited
    Inventors: Tomohiro Kawakubo, Hiroyoshi Tomita
  • Publication number: 20020057100
    Abstract: A voltage detecting circuit includes a constant-voltage source, a load part including a first transistor coupled to the constant-voltage source, and a detecting part which is connected to the load part and includes a second transistor of the same type as that of the first transistor. The detecting part detects a given voltage applied thereto.
    Type: Application
    Filed: March 16, 2000
    Publication date: May 16, 2002
    Inventors: Tomohiro Kawakubo, Hiroyoshi Tomita
  • Publication number: 20020009012
    Abstract: An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.
    Type: Application
    Filed: September 12, 2001
    Publication date: January 24, 2002
    Applicant: Fujitsu Limited
    Inventors: Shinya Fujioka, Tomohiro Kawakubo, Koichi Nishimura, Kotoku Sato
  • Publication number: 20010043493
    Abstract: An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.
    Type: Application
    Filed: March 30, 2001
    Publication date: November 22, 2001
    Applicant: Fujitsu Limited
    Inventors: Shinya Fujioka, Tomohiro Kawakubo, Koichi Nishimura, Kotoku Sato
  • Publication number: 20010017567
    Abstract: An internal voltage generation circuit with a small area, which has many correction points and can provide an output voltage with a high precision, has been disclosed. In this internal voltage generation circuit, some resistors, among the resistors which are connected in series constituting the feedback circuit, have different resistance and transfer gates are provided in parallel to the resistors of different resistance. This configuration has a decode function and, therefore, the decoder can be eliminated and the number of sets of an inverter, a transfer gate, and a resistor can also be reduced, resulting in a reduction in area without a reduction in the number of the correction points.
    Type: Application
    Filed: February 6, 2001
    Publication date: August 30, 2001
    Applicant: FUJITSU LIMITED
    Inventor: Tomohiro Kawakubo