Patents by Inventor Toshifumi Nakatani

Toshifumi Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050020227
    Abstract: A high frequency variable gain amplification device 100 includes: a feedback circuit 103 capable of changing a feedback impedance to adjust the gain of an amplifier 101 in accordance with a control signal from a control device 200; and a current consumption adjustment circuit 102 capable of adjusting current consumption of the amplifier 101. The control device 200 controls the feedback impedance and the current consumption based on a desired signal power level and an undesired signal power level. If the desired signal power level exceeds a predetermined value, the control device 200 reduces the feedback impedance to increase the amount of a feedback signal, thereby allowing the amplifier 101 to operate with low gain so as to prevent the distortion characteristic from being reduced and to reduce the current consumption.
    Type: Application
    Filed: July 21, 2004
    Publication date: January 27, 2005
    Inventors: Masahiro Kumagawa, Toshifumi Nakatani, Hisashi Adachi
  • Publication number: 20050002149
    Abstract: In a differential capacitor1, first and second capacitors 1003 and 1004 are formed in substantially symmetrical positions from each other with respect to a vertical plane B-B?, on a semiconductor substrate 1020. The differential capacitor 1 further includes a shield plate 1022 interposed between the semiconductor substrate 1020 and the lower electrodes 1016 and 1018. When each of the lower electrodes 1016 and 1018 is projected onto the shield plate 1022 along the vertical direction, each projected lower electrode 1016 or 1018 has a partial overlap with the shield plate 1022.
    Type: Application
    Filed: July 1, 2004
    Publication date: January 6, 2005
    Inventors: Toshifumi Nakatani, Hisashi Adachi, Kayo Nakanishi
  • Publication number: 20040232988
    Abstract: In order to enhance a reverse isolation characteristic of a differential amplifier, which is used as, for example, an RF amplifier or a local amplifier of a mobile telephone, the present invention provides a differential amplifier which includes a differential amplification circuit 10 for amplifying a difference in potential between two input signals in reverse phase with each other, which are inputted into Port1 and Port2, and for outputting two output signals in reverse phase with each other from Port3 and Port4; a feedback capacitor 7a connected between Port1 and Port4; and a feedback capacitor 7b connected between Port2 and Port3. Signals for canceling feedback signals are inputted into input terminals via the feedback capacitors 7a and 7b, respectively, whereby it is possible to the reverse isolation characteristic of the differential amplifier.
    Type: Application
    Filed: May 19, 2004
    Publication date: November 25, 2004
    Inventors: Toshifumi Nakatani, Hisashi Adachi
  • Publication number: 20040227608
    Abstract: A transformer element 1 is formed on a semiconductor substrate using first and second wiring layers arranged parallel to each other in a vertical direction, and includes a first inductor 2 and a second inductor 3. The first and second inductors 2 and 3 are each provided using the first and second wiring layers such that if projected into one of the first and second wiring layers either along a vertical upward direction or a vertical downward direction, outlines of a projection form a symmetrical shape with respect to a predetermined reference plane, and portions corresponding to intersections between the outlines of the projection on the wiring layer are formed so as to be out of contact with each other.
    Type: Application
    Filed: May 12, 2004
    Publication date: November 18, 2004
    Inventors: Toshifumi Nakatani, Hisashi Adachi
  • Publication number: 20040180633
    Abstract: The radio communication apparatus comprising an antenna, a transmitting circuit of outputting a transmitting signal in a first frequency band, a duplexer, connected to the antenna and having a single-phase input terminal and a balanced output terminal, of conveying the transmitting signal inputted to the single-phase input terminal to the antenna and outputting a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal, and a receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.
    Type: Application
    Filed: December 17, 2003
    Publication date: September 16, 2004
    Inventors: Toshifumi Nakatani, Atsushi Yamamoto, Hisashi Adachi
  • Publication number: 20040140511
    Abstract: A semiconductor differential circuit comprising a semiconductor substrate, a first semiconductor device on the semiconductor substrate having a gate electrode for having one of differential signals conveyed thereto and a drain electrode for outputting one of the differential signals controlled by the gate electrode, a second semiconductor device formed on the semiconductor substrate having a gate electrode for having the other of the differential signals conveyed thereto and a drain electrode for outputting the other of the differential signals controlled by the gate electrode, and wherein the drain electrode and drain electrode are placed in the proximity so that, at a predetermined frequency, it is equivalent to the one in which the drain electrode is grounded via a predetermined resistance, and the drain electrode is grounded via the predetermined resistance.
    Type: Application
    Filed: November 13, 2003
    Publication date: July 22, 2004
    Inventors: Toshifumi Nakatani, Hisashi Adachi, Yukio Hiraoka
  • Publication number: 20040136169
    Abstract: To provide a printed circuit board, a buildup substrate and a method of manufacturing the printed circuit board capable of curbing a transmission loss thereof at a desired frequency.
    Type: Application
    Filed: September 30, 2003
    Publication date: July 15, 2004
    Inventors: Shigeru Morimoto, Hisashi Adachi, Toshifumi Nakatani, Koji Takinami
  • Patent number: 6762546
    Abstract: An elastic support member 5 or an elastic support member-holding plate is located substantially in the middle portion of a frame portion (1 and 2), and a shadow mask is constructed such that a tension in the middle portion of the shadow mask 3 is larger than the tension in the edge portions of the shadow mask 3. In another aspect, a plurality of elastic support members 5 are such that at least two elastic support members having substantially different spring constants are combined.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: July 13, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Kurokawa, Koji Akiyama, Michiaki Watanabe, Toshifumi Nakatani, Hideo Suzuki, Shigeru Ohki
  • Publication number: 20040081266
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Application
    Filed: December 8, 2003
    Publication date: April 29, 2004
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Shunsuke Hirano, Masakatsu Maeda
  • Patent number: 6717998
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: April 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Publication number: 20040041680
    Abstract: A high-Q inductor for high frequency, having a plurality of inductor elements formed in a plurality of IC wiring layers with a connection formed therebetween. The directions of the magnetic fields generated by the respective inductor elements are substantially the same. With this construction, the section of the inductor is increased reducing the serial resistance component and an influence of a skin effect in a high-frequency range is eliminated increasing the Q value.
    Type: Application
    Filed: September 23, 2003
    Publication date: March 4, 2004
    Inventors: Toshiakira Andoh, Makoto Sakakura, Toshifumi Nakatani, Kouji Takinami, Yukio Hiraoka
  • Patent number: 6667657
    Abstract: An RF variable gain amplifying device has an amplifying circuit, a switch element connected in parallel with the amplifying circuit, and a resistor connected in parallel with the amplifying circuit and with the switch element. The amplifying circuit does not operate when the switch element is in the ON state but operates when the switch element is in the OFF state. A potential at each of the input and output terminals of the switch element is lower when the switch element is in the ON state than when the switch element is in the OFF state.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: December 23, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Junji Ito, Ikuo Imanishi
  • Patent number: 6664882
    Abstract: A high-Q inductor for high frequency, having a plurality of inductor elements formed in a plurality of IC wiring layers with a connection formed therebetween. The directions of the magnetic fields generated by the respective inductor elements are substantially the same. With this construction, the section of the inductor is increased reducing the serial resistance component and an influence of a skin effect in a high-frequency range is eliminated increasing the Q value.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: December 16, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiakira Andoh, Makoto Sakakura, Toshifumi Nakatani, Kouji Takinami, Yukio Hiraoka
  • Publication number: 20030201846
    Abstract: A balanced high-frequency device is constituted by a balanced device and a phase circuit. The input side of the balanced device is connected to an input terminal IN serving as an unbalanced input/output terminal and the output side of it is connected to output terminals OUT1 and OUT2 serving as balanced input/output terminals. Moreover, the phase circuit is connected between the output terminals.
    Type: Application
    Filed: March 17, 2003
    Publication date: October 30, 2003
    Inventors: Hiroyuki Nakamura, Toshifumi Nakatani, Toshio Ishizaki
  • Patent number: 6630782
    Abstract: An image display apparatus comprises, in a vacuum container formed by a rear container and a front glass container, a fluorescent layer, an electron emission source, electrodes to control electron beams emitted from the electron emission source. The electrodes are formed by stringing wires on frames made of a resilient material, and the frames on which the wires are strung have respectively pairs of opposing sides that are flat plates formed on the same surface. The electrodes that are free from waviness or warping have high flatness, control the focusing and deflection of the electron beams appropriately, and prevent deviation of the landing positions of the electron beams and errors including error irradiation. Such an image display apparatus can provide excellent images and high resolution.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: October 7, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Takatsugu Kurata, Kanji Imai
  • Publication number: 20030171061
    Abstract: A welding route of welding a color selecting electrode to a frame is as follows: first of all, a welding head moves down onto one end portion of a long frame side (Step I), welding is conducted from the end portion toward a center portion of the long frame side (Step II). Then, after moving up once (Step III), the welding head moves horizontally toward the other end portion of the long frame side (Step IV) and moves down onto the long frame side (Step V), and welding is conducted from the other end portion toward a center portion of the long frame side (Step VI). Finally, the welding head retracts (Step VII). With this welding route, the generation of wrinkles in the vicinity of the end portions of the long sides of the color selecting electrode can be suppressed.
    Type: Application
    Filed: December 10, 2002
    Publication date: September 11, 2003
    Inventors: Kiyohito Miwa, Toshifumi Nakatani, Tutomu Utsumi
  • Publication number: 20030080811
    Abstract: A variable gain amplifying apparatus has
    Type: Application
    Filed: October 2, 2002
    Publication date: May 1, 2003
    Inventors: Toshifumi Nakatani, Jyunji Itoh, Hideo Nakano
  • Patent number: 6529224
    Abstract: In a thermal head according to the present invention, a sacrificial layer of transition metal is formed on a top surface of a heat radiation substrate; a bridge layer of cermet or ceramic material is formed on a top surface of a heat insulation layer including the sacrificial layer; a cavity is made between the bridge layer and the heat insulation layer; a plurality of slits are made in the bridge layer overlying the cavity to expose the cavity; a highly adiabatic inorganic heat insulation layer is formed on a top surface of the bridge layer including the slits; and an inorganic protective layer of a material selected from among silicon or aluminum oxide, nitride and carbide is formed on a top surface of the inorganic heat insulation layer, where heating elements are formed between the slits over the inorganic heat insulation layer and the inorganic protective layer
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: March 4, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Takashi Shirakawa, Toshifumi Nakatani
  • Publication number: 20020171115
    Abstract: A high frequency (HF) semiconductor device includes a semiconductor substrate. An electroconductor layer is provided on the semiconductor substrate. A first insulator layer electrically insulates the electroconductor layer from the semiconductor substrate. N pieces of wires are provided on the semiconductor substrate, and N-phase signals (where N represents a positive integer greater than 2) are fed to the wires. A second insulator layer electrically insulates the wires from the electroconductor layer and the semiconductor substrate. N1 pieces of the wires are provided on one side of the electroconductor layer (where N1 represents 0 or a positive integer equaling or less than N). N2 pieces of the wires are provided on the other side of the electroconductor layer (where N2 represents 0 or a positive integer satisfying N1+N2=N).
    Type: Application
    Filed: May 17, 2002
    Publication date: November 21, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toshifumi Nakatani
  • Publication number: 20020145658
    Abstract: In a thermal head according to the present invention, a sacrificial layer of transition metal is formed on a top surface of a heat radiation substrate; a bridge layer of cermet or ceramic material is formed on a top surface of a heat insulation layer including the sacrificial layer; a cavity is made between the bridge layer and the heat insulation layer; a plurality of slits are made in the bridge layer overlying the cavity to expose the cavity; a highly adiabatic inorganic heat insulation layer is formed on a top surface of the bridge layer including the slits; and an inorganic protective layer of a material selected from among silicon or aluminum oxide, nitride and carbide is formed on a top surface of the inorganic heat insulation layer, where heating elements are formed between the slits over the inorganic heat insulation layer and the inorganic protective layer.
    Type: Application
    Filed: April 3, 2002
    Publication date: October 10, 2002
    Applicant: Alps Electric Co., Ltd.
    Inventors: Takashi Shirakawa, Toshifumi Nakatani