Abstract: A photoelectric conversion device, which is not influenced by low-frequency noise radiated from a power source line or the like, and an image sensor including the photoelectric conversion device are provided. The photoelectric conversion device includes a pixel which is constituted by a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type in the first semiconductor region, a first diffusion region of the first conductivity type on the second semiconductor region, and a second diffusion region of the second conductivity type in the second semiconductor region and in which an upper portion of the second semiconductor region is covered by a thick oxide film except a part of the upper portion which is covered by the second diffusion region. In the photoelectric conversion device, the first diffusion region is held at a predetermined potential.

Abstract: An N-channel MOS transistor of a semiconductor device having a high withstand voltage employs a drain structure with a low concentration and a large diffusion depth, which causes a problem in that a sufficiently high withstand voltage cannot be obtained due to a parasitic NPN transistor formed among the drain, the well, and the semiconductor substrate which are arranged in the stated order.

Abstract: A high-sensitive optical sensor is provided. In the optical sensor in which MOS transistors and a semiconductor light-receiving element are integrated, the light-receiving element includes a PN junction, and charges generated by the irradiation with light are accumulated at the PN junction, the PN junction of the light-receiving element is isolated from well regions of the MOS transistors.

Abstract: To provide a semiconductor device in which reduction of a variation in resistance value of a polycrystalline silicon film resistor is promoted. In a semiconductor device and a manufacturing method therefor according to the present invention, when the polycrystalline silicon film resistor is formed, a construction thereof is achieved by determining an implantation amount of an impurity implanted into the polycrystalline silicon film resistor through a novel technique to constitute a semiconductor integrated circuit device superior in performance.

Abstract: A semiconductor device is provided in which each of contacts between a source and a drain of a MOS transistor and a metallic wiring is either a contact having an arbitrary one side longer than the other side, or source contacts and well contacts are made batting contacts each having an arbitrary one side of a diffusion region having the same polarity as that of a well shorter than the other side. Thus, the contact shape is longitudinal in a transistor width direction, which makes it possible that a large current is caused to flow with a small interval of gates thereof.

Abstract: There is provided a semiconductor integrated circuit device with high electrostatic resistance. A semiconductor device is provided with a transistor for input-output protection having a desired size in which its channel length is varied with respect to a channel width direction.

Abstract: To provide a semiconductor device in which reduction of a variation in resistance value of a polycrystalline silicon film resistor is promoted. In a semiconductor device and a manufacturing method therefor according to the present invention, when the polycrystalline silicon film resistor is formed, a construction thereof is achieved by determining an implantation amount of an impurity implanted into the polycrystalline silicon film resistor through a novel technique to constitute a semiconductor integrated circuit device superior in performance.

Abstract: An N-channel MOS transistor of a semiconductor device having a high withstand voltage employs a drain structure with a low concentration and a large diffusion depth, which causes a problem in that a sufficiently high withstand voltage cannot be obtained due to a parasitic NPN transistor formed among the drain, the well, and the semiconductor substrate which are arranged in the stated order.

Abstract: There is a method of manufacturing a semiconductor element with a variety of types and at low cost.

Abstract: A semiconductor device is provided in which each of contacts between a source and a drain of a MOS transistor and a metallic wiring is either a contact having an arbitrary one side longer than the other side, or source contacts and well contacts are made batting contacts each having an arbitrary one side of a diffusion region having the same polarity as that of a well shorter than the other side. Thus, the contact shape is longitudinal in a transistor width direction, which makes it possible that a large current is caused to flow with a small interval of gates thereof.

Abstract: A high-sensitive optical sensor is provided. In the optical sensor in which MOS transistors and a semiconductor light-receiving element are integrated, the light-receiving element includes a PN junction, and charges generated by the irradiation with light are accumulated at the PN junction, the PN junction of the light-receiving element is isolated from well regions of the MOS transistors.

Abstract: There is provided a semiconductor integrated circuit device with high electrostatic resistance. A semiconductor device is provided with a transistor for input-output protection having a desired size in which its channel length is varied with respect to a channel width direction.

Abstract: There is provided a MOS transistor in which a leak current is suppressed. Impurity regions which have a polarity different from that to drain regions and a higher concentration than that of a well region in the MOS transistor are formed in lower portions of the drain regions in the MOS transistor, so that extension of depletion layers between the drain regions and the well region to a well region side can be suppressed. In particular, since the extension of the depletion layers to the well region side in the lower portions of the drain regions can be suppressed, a large effect is obtained with respect to a suppression of a current flowing through deeper regions than channel regions.

Abstract: To provide a capacitive sensor which produces a sensor output excellent in linearity. The capacitive sensor comprises a first semiconductor substrate and a second substrate. The first semiconductor substrate is formed with a frame portion and a diaphragm portion serving as a movable electrode, and bonded with the second substrate at the upper surface of the frame portion by anodic bonding. The second substrate is provided with a fixed electrode on a surface facing the diaphragm portion. A fixing projection is provided on a center of the diaphragm portion and is fixed to the second substrate through a hole of the fixed electrode. When external force is applied to the sensor, the diaphragm portion displaces upward and/or downward. The external force is detected based on change of electrostatic capacitance. Since the center of the diaphragm portion is fixed by the fixing projection, the maximum displacement region of the diaphragm portion forms a ring, resulting in enhancement of linearity of the sensor output.