Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: The invention relates to a mobile terminal that intends to increase channel capacity and transmission quality properly within the confines of costs. The invention provides a mobile terminal including measuring section measuring a downstream transmission loss using a pilot signal transmitted from each radio base station; and selecting section comparing transmitting power of a pilot signal corresponding to the lowest measured transmission loss with transmitting power of pilot signals for each of which a difference between a corresponding measured transmission loss and a lowest measured transmission loss is smaller than a prescribed value, and selecting, as an origination destination or handover destination, a radio base station that transmits a pilot signal having a lowest transmitting power among those pilot signals, if a difference between the lowest measured transmission loss and a second lowest measured transmission loss is not larger than or equal to a prescribed value.

Abstract: When a service requested by a user is provided by communication, a mapping unit uses a prescribed function to map (convert) information that has been entered the auser in order that the user may receive provision of service, or information that has been gathered or acquired in the course of execution of a call connection or communication service. A service generating unit, which generates a service for the user, generates added value (e.g., content) based upon the result of mapping, applies this added value to the service requested by the user and provides the service to the user. Alternatively, on the basis of a converted value obtained, a modification is applied to a service provided by an information provider or to the specifics of the service, and the modified service is supplied to the user.

Abstract: A knocking control apparatus for a variable cylinder internal combustion engine avoids erroneous determination of knocking during a fault in a cylinder pausing mechanism to appropriately control knocking associated with the ignition timing, thereby preventing engine stall and reducing a deterioration in a catalyst. The variable cylinder internal combustion engine can be switched between a full cylinder operation mode in which all of a plurality of cylinders are operated, and a partial cylinder operation mode in which part of the plurality of cylinders is paused by a cylinder pausing mechanism.

Abstract: A knocking control apparatus for a variable cylinder internal combustion engine avoids erroneous determination of knocking during a fault in a cylinder pausing mechanism to appropriately control knocking associated with the ignition timing, thereby preventing engine stall and reducing a deterioration in a catalyst. The variable cylinder internal combustion engine can be switched between a full cylinder operation mode in which all of a plurality of cylinders are operated, and a partial cylinder operation mode in which part of the plurality of cylinders is paused by a cylinder pausing mechanism.

Abstract: A vehicle floor structure with a floor body provided to a body frame is provided. The floor body is a hollow panel integrally formed by arranging a plurality of core materials with spaces on a flat plate and placing another flat plate over the core materials. In order to increase the rigidity of the entire floor body, core materials in edge portions of the floor body are joined to the body frame.

Abstract: A memory space of a memory cell array is previously divided into a plurality of sub memory spaces. A refresh control circuit executes control of performing refreshment of information to the sub memory spaces are in use at the time of the refreshment of the information and need the refreshment among the plurality of sub memory spaces, and the control of not performing the refreshment to the sub memory spaces which are not in use and do not need the refreshment.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: A memory device includes a memory node (1) to which charge is written through a tunnel barrier configuration (2) from a control electrode (9). The stored charge effects the conductivity of a source/drain path (4) and data is read by monitoring the conductivity of the path. The charge barrier configuration comprises a multiple tunnel barrier configuration, which may comprise alternating layers (16) of polysilicon of 3 nm thickness and layers (15) of Si3N4 of 1 nm thickness, overlying polycrystalline layer of silicon (1) which forms the memory node. Alternative barrier configurations (2) are described, including a Schottky barrier configuration, and conductive nanometer scale conductive islands (30, 36, 44), which act as the memory node, distributed in an electrically insulating matrix.

Abstract: There is proposed a high-sensitive TMR element wherein the selection of electronic state contributing to tunnel conduction is optimized. In this invention, a junction plane between a ferromagnetic layer (210) having a bcc structure and a tunnel barrier layer (310) is constituted by (211) plane or (110) plane of the ferromagnetic layer (210). The tunnel barrier layer (310) is formed of a thin aluminum oxide film which is formed through two stages, i.e. a first stage wherein an aluminum film having a thickness of 1 nm or less is formed on the surface of a magnetic metal by taking advantage of the excellent wettability of aluminum to the surface of metallic film, the resultant aluminum film being subsequently naturally oxidized or oxidized by oxygen radical; and a second stage wherein an aluminum thin film is formed directly from an aluminum flux in an oxygen atmosphere or an atmosphere of oxygen radical.

Abstract: In a magnetic head, a head element and bumps connected thereto are formed on one end face of a slider substrate, and an insulating film is formed on the other end face opposite from the one end face. Therefore, even when the slider is electrically charged, the other end face thereof does not contact bumps formed in another slider substrate, and charges of the slider substrate will not move into the bumps. This prevents the slider substrate from electrostatic damage.

Abstract: An exposure mask for exposing a photosensitive resist layer formed on the surface of a substrate having an element so that the resist layer remains in the shape of an ABS pattern includes a mark provided within a light transmission section for exposure. The mark determines a relative position between the substrate and the light transmission section on the basis of the element. An exposure method using the exposure mask includes the steps of: determining a relative position between the substrate and the light transmission section on the basis of the element by the mark provided within the light transmission section of the exposure mask; exposing the photosensitive resist layer on the surface of the substrate through the light transmission section of the exposure mask; and developing the exposed photosensitive resist layer so that the resist layer is left in the shape of the ABS pattern.

Abstract: A vehicle floor structure with a floor body provided to a body frame is provided. The floor body is a hollow panel integrally formed by arranging a plurality of core materials with spaces on a flat plate and placing another flat plate over the core materials. In order to increase the rigidity of the entire floor body, core materials in edge portions of the floor body are joined to the body frame.

Abstract: In a magnetic head, a head element and bumps connected thereto are formed on one end face of a slider substrate, and an insulating film is formed on the other end face opposite from the one end face. Therefore, even when the slider is electrically charged, the other end face thereof does not contact bumps formed in another slider substrate, and charges of the slider substrate will not move into the bumps. This prevents the slider substrate from electrostatic damage.

Abstract: An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.

Abstract: A magnetic sensor is constructed to be capable of detecting the change of tunnel current due to co-tunneling effect at a high S/N ratio by using a tunneling magneto-resistive element having a first magnetic layer of a soft magnetic material formed on a flat substrate, first and second tunnel barrier layers formed on the first magnetic layer, magnetic particles of a ferromagnetic material provided between the first and second tunnel barrier layers, and a second magnetic layer of a soft magnetic material formed on the second tunnel barrier layer so as to create tunneling junctions.

Abstract: A magnetic sensor is constructed to be capable of detecting the change of tunnel current due to co-tunneling effect at a high S/N ratio by using a tunneling magneto-resistive element having a first magnetic layer of a soft magnetic material formed on a flat substrate, first and second tunnel barrier layers formed on the first magnetic layer, magnetic particles of a ferromagnetic material provided between the first and second tunnel barrier layers, and a second magnetic layer of a soft magnetic material formed on the second tunnel barrier layer so as to create tunneling junctions.

Abstract: An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.

Abstract: A central portion of a main face of a package substrate 2 is mounted with a memory chip 1 using face down bonding by a flip chip bonding system. Further, a plurality of chip condensers 7 are mounted at vicinities of the memory chip 1. A clearance between a main face (lower face) of the memory chip 1 and a main face of the package substrate 2 is filled with underfill resin (seal resin) 10 constituting a seal member for achieving protection of connecting portions and for relaxation of thermal stress. An outer edge of the underfill resin 10 is extended to an outer side of the memory chip 1 and covers entire faces of the chip condensers 7 mounted at vicinities of the memory chip 1.