Patents by Inventor Toshihiko Shiga

Toshihiko Shiga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10854523
    Abstract: A semiconductor device according to the present invention includes: a substrate; a heat generating portion provided on the substrate; a cap substrate provided above the substrate so that a hollow portion is provided between the substrate and the cap substrate; and a reflection film provided above the heat generating portion and reflecting a medium wavelength infrared ray. The reflection film reflects the infrared ray radiated to the cap substrate side through the hollow portion due to the temperature increase of the heat generating portion, so that the temperature increase of the cap substrate side can be suppressed. Because of this function, even if mold resin is provided on the cap substrate, increase of the temperature of the mold resin can be suppressed.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: December 1, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Koichiro Nishizawa, Yoshitsugu Yamamoto, Katsumi Miyawaki, Shinsuke Watanabe, Toshihiko Shiga
  • Publication number: 20200185285
    Abstract: A semiconductor device according to the present invention includes: a substrate; a heat generating portion provided on the substrate; a cap substrate provided above the substrate so that a hollow portion is provided between the substrate and the cap substrate; and a reflection film provided above the heat generating portion and reflecting a medium wavelength infrared ray. The reflection film reflects the infrared ray radiated to the cap substrate side through the hollow portion due to the temperature increase of the heat generating portion, so that the temperature increase of the cap substrate side can be suppressed. Because of this function, even if mold resin is provided on the cap substrate, increase of the temperature of the mold resin can be suppressed.
    Type: Application
    Filed: October 24, 2016
    Publication date: June 11, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Koichiro NISHIZAWA, Yoshitsugu YAMAMOTO, Katsumi MIYAWAKI, Shinsuke WATANABE, Toshihiko SHIGA
  • Patent number: 9018736
    Abstract: A semiconductor device includes a substrate having a hexagonal crystalline structure and a (0001) surface, and conductive films on the surface of the substrate. The conductive films include a first conductive film and a second conductive film located above the first conductive film with respect to the surface, wherein the first conductive film has a crystalline structure which does not have a plane that has a symmetry equivalent to the symmetry of atomic arrangement in the surface of the substrate, the second conductive film has a crystalline structure having at least one plane that has a symmetry equivalent to the symmetry of atomic arrangement in the surface of the substrate, and the second conductive film is polycrystalline and has a grain size no larger than 15 ?m.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: April 28, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhiro Maeda, Toshihiko Shiga
  • Publication number: 20140319513
    Abstract: A semiconductor device includes a substrate having a hexagonal crystalline structure and a (0001) surface, and conductive films on the surface of the substrate. The conductive films include a first conductive film and a second conductive film located above the first conductive film with respect to the surface, wherein the first conductive film has a crystalline structure which does not have a plane that has a symmetry equivalent to the symmetry of atomic arrangement in the surface of the substrate, the second conductive film has a crystalline structure having at least one plane that has a symmetry equivalent to the symmetry of atomic arrangement in the surface of the substrate, and the second conductive film is polycrystalline and has a grain size no larger than 15 ?m.
    Type: Application
    Filed: January 24, 2014
    Publication date: October 30, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuhiro Maeda, Toshihiko Shiga
  • Patent number: 8766445
    Abstract: A semiconductor device includes: a semiconductor substrate; an underlying wiring on the semiconductor substrate; a resin film extending to the semiconductor substrate and the underlying wiring, and having a first opening on the underlying wiring; a first SiN film on the underlying wiring and the resin film, and having a second opening in the first opening; an upper layer wiring on the underlying wiring and part of the resin film; and a second SiN film on the upper layer wiring and the resin film, and joined to the first SiN film on the resin film. The upper layer wiring includes a Ti film, connected to the underlying wiring via the first and second openings, and an Au film on the Ti film. The first and second SiN films circumferentially protect the Ti film.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: July 1, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Hisaka, Takahiro Nakamoto, Toshihiko Shiga, Koichiro Nishizawa
  • Publication number: 20130093061
    Abstract: A semiconductor device includes: a semiconductor substrate; an underlying wiring on the semiconductor substrate; a resin film extending to the semiconductor substrate and the underlying wiring, and having a first opening on the underlying wiring; a first SiN film on the underlying wiring and the resin film, and having a second opening in the first opening; an upper layer wiring on the underlying wiring and part of the resin film; and a second SiN film on the upper layer wiring and the resin film, and joined to the first SiN film on the resin film. The upper layer wiring includes a Ti film, connected to the underlying wiring via the first and second openings, and an Au film on the Ti film. The first and second SiN films circumferentially protect the Ti film.
    Type: Application
    Filed: June 18, 2012
    Publication date: April 18, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki HISAKA, Takahiro NAKAMOTO, Toshihiko SHIGA, Koichiro NISHIZAWA
  • Patent number: 7879635
    Abstract: A method for manufacturing a laser diode includes: providing a semiconductor structure in which semiconductor layers are laminated; forming a waveguide ridge in the layers; forming an SiO2 film over the entire surface; forming a second resist pattern covering the SiO2 film in channels adjacent the waveguide ridge such that top surfaces of the second resist pattern in the channels are higher than the top surface of a p-GaN layer in the waveguide ridge and lower than the top surface of the SiO2 film on the top of the waveguide ridge, the second resist pattern exposing the top surface of the SiO2 film on the top of the waveguide ridge; removing the SiO2 film, using the second resist pattern as a mask, to expose the top surface of the p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: February 1, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshihiko Shiga, Hitoshi Sakuma
  • Patent number: 7851831
    Abstract: A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. A first portion of the gate electrode layer, in contact with the nitride semiconductor layer, has a higher nitrogen mole fraction than a second portion of the gate electrode layer.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: December 14, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo, Toshihiko Shiga
  • Patent number: 7791097
    Abstract: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: September 7, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kyozo Kanamoto, Katsuomi Shiozawa, Kazushige Kawasaki, Hitoshi Sakuma, Junichi Horie, Toshihiko Shiga, Toshiyuki Oishi
  • Patent number: 7714439
    Abstract: A nitride semiconductor device according to the present invention includes a P-type contact layer and a P-type electrode provided on the P-type contact layer. The P-type electrode includes a AuGa film provided on the P-type contact layer, a Au film provided on the AuGa film, a Pt film 4 provided on the Au film, and a Au film provided on the Pt film. The ratio of the thickness of the AuGa film to the total thickness of the AuGa film and the Au film is not less than 12% but not more than 46%.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: May 11, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Katsuomi Shiozawa, Hitoshi Sakuma, Kazushige Kawasaki, Toshihiko Shiga, Toshiyuki Oishi
  • Patent number: 7616673
    Abstract: A semiconductor laser device includes a semiconductor laser body including a resonator and having a front end face and a rear end face facing each other, the resonator being located between the front end face and the rear end face. The front end face emits principal laser light. A reflectance control film is disposed on the front end face or the rear end face of the semiconductor laser body and is made up of either an aluminum oxide film or a five-layer film including the aluminum oxide film disposed such that it is the layer in the five-layer film farthest from the front end face or the rear end face. A silicon oxide film is disposed on the aluminum oxide film of the reflectance control film and has a thickness of 20 nm or less.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: November 10, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiromasu Matsuoka, Yasuyuki Nakagawa, Toshihiko Shiga
  • Patent number: 7598548
    Abstract: A Schottky electrode including a WNx layer on an n-type GaN layer. A crystal plane of the n-type GaN layer is in contact with a crystal plane of the WNx layer. The crystal plane of the n-type GaN layer is a (0001)-plane, and the crystal plane of the WNx layer is (111)-oriented. The WNx layer may be an electrode layer having an NaCl-type structure including at least one metal selected from the group consisting of zirconium, hafnium, niobium, tantalum, molybdenum and tungsten, and at least one element selected from nitrogen and carbon. Further, the lattice constant of the electrode layer is preferably 0.95 to 1.05 times the a-axis lattice constant of the n-type GaN layer, multiplied by 2(1/2).
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: October 6, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshihiko Shiga
  • Patent number: 7569911
    Abstract: An ohmic electrode is formed by stacking a lower Ti layer, a diffusion preventing layer, an upper Ti layers and a metallic (Au) layer on a p-type GaAs layer. The diffusion preventing layer includes tantalum (Ta) or niobium (Nb). Thus, interdiffusion of Ga and As in the p-type GaAs layer and Au in the metallic layer can be prevented, and variation in resistivity of the ohmic electrode in a high-temperature, high-humidity environment can be suppressed.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: August 4, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshihiko Shiga, Hitoshi Nakamura, Junji Tanimura
  • Publication number: 20080246060
    Abstract: A transistor includes a nitride semiconductor layer and a gate electrode layer. The gate electrode layer includes a tantalum nitride layer being formed on the nitride semiconductor layer. The tantalum nitride layer forms a Schottky junction with the nitride semiconductor layer. The transistor also includes an insulating film formed on the nitride semiconductor layer. The insulating film surrounds the gate electrode layer. The portion of the gate electrode layer in contact with the nitride semiconductor layer has a higher nitrogen mole fraction than the other portion of the gate electrode layer.
    Type: Application
    Filed: September 24, 2007
    Publication date: October 9, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hidetoshi Koyama, Yoshitaka Kamo, Toshihiko Shiga
  • Publication number: 20080116575
    Abstract: A nitride semiconductor device according to the present invention includes a P-type contact layer and a P-type electrode provided on the P-type contact layer. The P-type electrode includes a AuGa film provided on the P-type contact layer, a Au film provided on the AuGa film, a Pt film 4 provided on the Au film, and a Au film provided on the Pt film. The ratio of the thickness of the AuGa film to the total thickness of the AuGa film and the Au film is not less than 12% but not more than 46%.
    Type: Application
    Filed: August 24, 2007
    Publication date: May 22, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuomi Shiozawa, Hitoshi Sakuma, Kazushige Kawasaki, Toshihiko Shiga, Toshiyuki Oishi
  • Publication number: 20080029777
    Abstract: A LD (Laser Diode) includes: a laminated semiconductor structure including an active layer, a p-cladding layer, a contact layer, etc. that are sequentially on top of one another on an n-GaN substrate; a waveguide ridge including the contact layer and a portion of the p-cladding layer; a first silicon insulating film covering sidewalls of the waveguide ridge and having an opening that exposes a top of the waveguide ridge; an adhesive layer disposed on the first silicon insulating film, but not in the opening, and on the top of the waveguide ridge, wherein the adhesive layer includes a first adhesive film of Ti; and a p-side electrode over the adhesive layer such that the p-side electrode is in contact with the contact layer at the top of the waveguide ridge, through the opening.
    Type: Application
    Filed: July 12, 2007
    Publication date: February 7, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Toshihiko Shiga
  • Publication number: 20080023799
    Abstract: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 31, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kyozo KANAMOTO, Katsuomi Shiozawa, Kazushige Kawasaki, Hitoshi Sakuma, Junichi Horie, Toshihiko Shiga, Toshiyuki Oishi
  • Publication number: 20080020502
    Abstract: A method for manufacturing a laser diode includes: providing a semiconductor structure in which semiconductor layers are laminated; forming a waveguide ridge in the layers; forming an SiO2 film over the entire surface; forming a second resist pattern covering the SiO2 film in channels adjacent the waveguide ridge such that top surfaces of the second resist pattern in the channels are higher than the top surface of a p-GaN layer in the waveguide ridge and lower than the top surface of the SiO2 film on the top of the waveguide ridge, the second resist pattern exposing the top surface of the SiO2 film on the top of the waveguide ridge; removing the SiO2 film, using the second resist pattern as a mask, to expose the top surface of the p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 24, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Toshihiko Shiga, Hitoshi Sakuma
  • Patent number: 7288486
    Abstract: In a method for manufacturing a semiconductor device wherein via holes are formed in an SiC substrate, a stacked film consisting of a Ti film and an Au film is formed on the back face of the SiC substrate, and a Pd film is formed thereon. Then, an Ni film is formed by non-electrolytic plating, using the Pd film as a catalyst. Thereafter, via holes penetrating through the SiC substrate are formed by etching, using the Ni film as a mask.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: October 30, 2007
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeo Shirahama, Toshihiko Shiga, Kouichirou Hori
  • Publication number: 20070128852
    Abstract: In a method for manufacturing a semiconductor device wherein via holes are formed in an SiC substrate, a stacked film consisting of a Ti film and an Au film is formed on the back face of the SiC substrate, and a Pd film is formed thereon. Then, an Ni film is formed by non-electrolytic plating, using the Pd film as a catalyst. Thereafter, via holes penetrating through the SiC substrate are formed by etching, using the Ni film as a mask.
    Type: Application
    Filed: June 22, 2006
    Publication date: June 7, 2007
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeo Shirahama, Toshihiko Shiga, Kouichirou Hori