Patents by Inventor Toshihiko Shiga

Toshihiko Shiga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070053398
    Abstract: A semiconductor laser device includes a semiconductor laser body including a resonator and having a front end face and a rear end face facing each other, the resonator being located between the front end face and the rear end face. The front end face emits principal laser light. A reflectance control film is disposed on the front end face or the rear end face of the semiconductor laser body and is made up of either an aluminum oxide film or a five-layer film including the aluminum oxide film disposed such that it is the layer in the five-layer film farthest from the front end face or the rear end face. A silicon oxide film is disposed on the aluminum oxide film of the reflectance control film and has a thickness of 20 nm or less.
    Type: Application
    Filed: May 24, 2006
    Publication date: March 8, 2007
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiromasu Matsuoka, Yasuyuki Nakagawa, Toshihiko Shiga
  • Publication number: 20070035024
    Abstract: An ohmic electrode is formed by stacking a lower Ti layer, a diffusion preventing layer, an upper Ti layer, and a metallic (Au) layer on a p-type GaAs layer. The diffusion preventing layer includes tantalum (Ta) or niobium (Nb). Thus, interdiffusion of Ga and As in the p-type GaAs layer and Au in the metallic layer can be prevented, and variation in resistivity of the ohmic electrode in a high-temperature, high-humidity environment can be suppressed.
    Type: Application
    Filed: April 25, 2006
    Publication date: February 15, 2007
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshihiko Shiga, Hitoshi Nakamura, Junji Tanimura
  • Publication number: 20060231871
    Abstract: A gate electrode serving as a Schottky electrode includes a TaNx layer and an Au layer. The TaNx layer serves as a barrier metal for preventing atoms from diffusing from the Au layer into a substrate. TaNx does not contain Si, and therefore has a higher humidity resistance than WSiN containing Si. Accordingly, the gate electrode has a higher humidity resistance than a conventional gate electrode including a WSiN layer. Setting a nitrogen content at less than 0.8 can prevent significant degradation in Schottky characteristics as compared to the conventional gate electrode. Setting the nitrogen content at 0.5 or less, Schottky characteristics can be improved more than in the conventional gate electrode.
    Type: Application
    Filed: March 14, 2006
    Publication date: October 19, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirotaka Amasuga, Toshihiko Shiga, Tetsuo Kunii, Tomoki Oku
  • Publication number: 20060145201
    Abstract: A Schottky electrode including a WNx layer on an n-type GaN layer. A crystal plane of the n-type GaN layer is in contact with a crystal plane of the WNx layer. The crystal plane of the n-type GaN layer is a (0001)-plane, and the crystal plane of the WNx layer is (111)-oriented. The WNx layer may be an electrode layer having an NaCl-type structure including at least one metal selected from the group consisting of zirconium, hafnium, niobium, tantalum, molybdenum and tungsten, and at least one element selected from nitrogen and carbon. Further, the lattice constant of the electrode layer is preferably 0.95 to 1.05 times the a-axis lattice constant of the n-type GaN layer, multiplied by 2(1/2).
    Type: Application
    Filed: December 1, 2005
    Publication date: July 6, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshihiko Shiga
  • Patent number: 6013926
    Abstract: A semiconductor device includes a self-aligned refractory metal constituent in a recess in a semiconductor substrate and having the same plane pattern as a bottom surface of the recess. The width of the constituent is determined by the plane pattern of the recess and, accordingly, the pattern width of the constituent is easily controlled by the plane pattern of the recess.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: January 11, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomoki Oku, Naohito Yoshida, Shinichi Miyakuni, Toshihiko Shiga
  • Patent number: 5631479
    Abstract: A semiconductor device includes a semiconductor substrate having a surface; an active layer of a compound semiconductor disposed at the surface of the semiconductor substrate; and a Schottky barrier gate electrode including a multi-layer film alternately laminating a conductive refractory metal compound layer including a first refractory metal (M.sub.1) and a second refractory metal (M.sub.2) layer to three or more layers respectively, disposed on the active layer, thereby forming a Schottky junction with the active layer. The gate resistance of the Schottky barrier gate electrode can be held low and the internal stress can be reduced, whereby peeling off of the can be suppressed.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: May 20, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshihiko Shiga
  • Patent number: 5498572
    Abstract: A method for manufacturing a semiconductor device including forming an electrode on a part of a semiconductor substrate, depositing an insulating film on the semiconductor substrate and on the electrode, and forming a contact hole penetrating through the insulating film to expose a part of the electrode; forming a barrier metal layer on the electrode in the contact hole, on the internal side surface of the contact hole, and on the surface of the insulating film; and depositing a metal layer on the barrier metal layer and patterning the metal layer and the barrier metal layer to form a wiring layer wherein the barrier metal layer comprises a metal that does not form an intermetallic material by solid state diffusion with either of the electrode and the metal layer even at elevated temperatures.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: March 12, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshihiko Shiga, Ryo Hattori, Tomoki Oku