Patents by Inventor Toshio Saito
Toshio Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10381959Abstract: A motor control device includes: an inverter circuit including a semiconductor switching element for drive which drives a motor; a cut-off circuit including a semiconductor switching element for cut-off which cuts off an electric connection between the motor and the inverter circuit; a failure detection unit; a rotation number detection unit; and a control unit. In a case where the failure detection unit detects a failure of the semiconductor switching element for drive, the control unit turns off the semiconductor switching element for drive, and in a case where the number of rotations of the motor which is detected by the rotation number detection unit is less than a predetermined first threshold, the control unit further turns off the semiconductor switching element for cut-off.Type: GrantFiled: March 10, 2017Date of Patent: August 13, 2019Assignee: OMRON AUTOMOTIVE ELECTRONICS CO., LTD.Inventors: Taiki Yamane, Toshio Saito
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Patent number: 10266686Abstract: An anti-vibration rubber of the present invention is an anti-vibration rubber for washing machines. In temperature variance measurement of dynamic viscoelasticity at a frequency of 30 Hz, the anti-vibration rubber has a maximum loss factor at a temperature of ?10° C. to 40° C., both inclusive, and has a loss factor of 0.4 or more in the entire temperature range of ?10° C. to 40° C., both inclusive, at the frequency of 30 Hz.Type: GrantFiled: September 12, 2018Date of Patent: April 23, 2019Assignee: Yamauchi CorporationInventors: Toshio Saito, Hiroyuki Maruko
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Publication number: 20190039096Abstract: A separation apparatus for separating an unwanted substance from an extraction target includes a forming unit configured to form a separation chamber through which the extraction target passes, and a suction unit communicating with the separation chamber in a direction crossing a passage direction of the extraction target and configured to suck air in the separation chamber. The forming unit includes an inlet for the extraction target, which communicates with the separation chamber, and an outlet for the extraction target, which communicates with the separation chamber, and the air is sucked from the outlet into the separation chamber by suction of the suction unit.Type: ApplicationFiled: March 19, 2018Publication date: February 7, 2019Inventors: Kaishun KIHARA, Toshio SAITO
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Publication number: 20190038066Abstract: An extracting method of extracting a beverage liquid from an extraction target includes a pressure reduction step of switching an interior of an extraction container in which the extraction target and a liquid are stored from a first air pressure to a second air pressure lower than the first air pressure, and an extraction step of extracting the beverage liquid from the extraction target. The first air pressure is an air pressure at which the liquid at a predetermined temperature does not boil, and the second air pressure is an air pressure at which the liquid that does not boil at the first air pressure boils. The switching from the first air pressure to the second air pressure is done by releasing the air pressure in the extraction container.Type: ApplicationFiled: March 19, 2018Publication date: February 7, 2019Inventors: Kaishun Kihara, Kazuki Togashi, Taisuke Torizu, Nobuhiro Noake, Kazuhiro Abe, Toshio Saito
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Publication number: 20190010320Abstract: An anti-vibration rubber of the present invention is an anti-vibration rubber for washing machines. In temperature variance measurement of dynamic viscoelasticity at a frequency of 30 Hz, the anti-vibration rubber has a maximum loss factor at a temperature of ?10° C. to 40° C., both inclusive, and has a loss factor of 0.4 or more in the entire temperature range of ?10° C. to 40° C., both inclusive, at the frequency of 30 Hz.Type: ApplicationFiled: September 12, 2018Publication date: January 10, 2019Inventors: Toshio SAITO, Hiroyuki MARUKO
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Patent number: 9963815Abstract: An anti-vibration rubber of the present invention is an anti-vibration rubber for washing machines. In temperature variance measurement of dynamic viscoelasticity at a frequency of 10 Hz, the anti-vibration rubber has a maximum loss factor at a temperature of 0° C. to 40° C., both inclusive, and has a loss factor of 0.5 or more in the entire temperature range of 0° C. to 40° C., both inclusive, at the frequency of 10 Hz.Type: GrantFiled: April 28, 2016Date of Patent: May 8, 2018Assignee: YAMAUCHI CORP.Inventors: Toshio Saito, Hiroyuki Maruko
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Publication number: 20170355842Abstract: An anti-vibration rubber of the present invention is an anti-vibration rubber for washing machines. In temperature variance measurement of dynamic viscoelasticity at a frequency of 10 Hz, the anti-vibration rubber has a maximum loss factor at a temperature of 0° C. to 40° C., both inclusive, and has a loss factor of 0.5 or more in the entire temperature range of 0° C. to 40° C., both inclusive, at the frequency of 10 Hz.Type: ApplicationFiled: April 28, 2016Publication date: December 14, 2017Inventors: Toshio SAITO, Hiroyuki MARUKO
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Publication number: 20170335095Abstract: An anti-vibration rubber of the present invention is an anti-vibration rubber for washing machines. In temperature variance measurement of dynamic viscoelasticity at a frequency of 30 Hz, the anti-vibration rubber has a maximum loss factor at a temperature of ?10° C. to 40° C., both inclusive, and has a loss factor of 0.4 or more in the entire temperature range of ?10° C. to 40° C., both inclusive, at the frequency of 30 Hz.Type: ApplicationFiled: April 28, 2016Publication date: November 23, 2017Inventors: Toshio SAITO, Hiroyuki MARUKO
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Publication number: 20170331399Abstract: A motor control device includes: an inverter circuit including a semiconductor switching element for drive which drives a motor; a cut-off circuit including a semiconductor switching element for cut-off which cuts off an electric connection between the motor and the inverter circuit; a failure detection unit; a rotation number detection unit; and a control unit. In a case where the failure detection unit detects a failure of the semiconductor switching element for drive, the control unit turns off the semiconductor switching element for drive, and in a case where the number of rotations of the motor which is detected by the rotation number detection unit is less than a predetermined first threshold, the control unit further turns off the semiconductor switching element for cut-off.Type: ApplicationFiled: March 10, 2017Publication date: November 16, 2017Applicant: OMRON AUTOMOTIVE ELECTRONICS CO., LTD.Inventors: Taiki Yamane, Toshio Saito
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Patent number: 8354730Abstract: A structure obtaining a desired integrated circuit by sticking together a plurality of semiconductor substrates and electrically connecting integrated circuits formed on semiconductor chips of the respective semiconductor substrates is provided, and a penetrating electrode penetrating between a main surface and a rear surface of each of the semiconductor substrates and a penetrating separation portion separating the penetrating electrode are separately arranged. Thereby, after forming an insulation trench portion for formation of the penetrating separation portion on the semiconductor substrate, a MIS•FET is formed, and then, a conductive trench portion for formation of the penetrating electrode can be formed. Therefore, element characteristics of a semiconductor device having a three-dimensional structure can be improved.Type: GrantFiled: August 25, 2006Date of Patent: January 15, 2013Assignees: Hitachi, Ltd., Honda Motor Co., Ltd.Inventors: Satoshi Moriya, Toshio Saito, Goichi Yokoyama, Tsuyoshi Fujiwara, Hidenori Sato, Nobuaki Miyakawa
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Patent number: 7948088Abstract: In order to improve the manufacturing yield of a semiconductor device having a three-dimensional structure in which a plurality of chips are stacked and attached to each other, the opening shape of each of conductive grooves (4A) formed in each chip (C2) obtained from a wafer (W2) is rectangular, and the number of the conductive grooves (4A) whose long-sides are directed in a Y direction and the number of the conductive grooves (4A) whose long-sides are directed in an X direction perpendicular to the Y direction are made to be approximately equal to each other number in the entire wafer (W2), whereby the film stress upon embedding of a conductive film into the interior of the conductive grooves is reduced, and generation of exfoliation and micro-cracks in the conductive film or warpage and cracks of the wafer (W2) are prevented.Type: GrantFiled: August 25, 2006Date of Patent: May 24, 2011Assignees: Hitachi, Ltd., Honda Motor Co., Ltd.Inventors: Toshio Saito, Satoshi Moriya, Morio Nakamura, Goichi Yokoyama, Tatsuyuki Saito, Nobuaki Miyakawa
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Patent number: 7847201Abstract: In order to prevent rattling and avoid generation of chips at the time of assembly in a storage case for a power steering control unit of a vehicle, a storage case includes a base having a plate-shaped substrate member, and a box-shaped cover having an opening on the lower side and being mounted on the base so as to cover the upper surface of the substrate member, wherein rattling preventing projections are provided at a plurality of positions on the peripheral edge of the substrate member so as to come into abutment with an opening-side edge of the cover, which is positioned at a mounting position with respect to the base, from the outside; on the inner side of the rattling-preventing projections bevels are formed, which presses the opening-side edge to resiliently deform the peripheral wall of the cover inward and causes a reaction force to act in a direction in which the cover moves away from the substrate member and comes apart from the base; and the opening-side edge is formed with a crimping projectionType: GrantFiled: May 26, 2005Date of Patent: December 7, 2010Assignee: Omron Automotive Electronics Co., Ltd.Inventors: Tetsuya Fukumoto, Toshio Saito, Kazushi Kadogaki, Takeshi Yasuda
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Patent number: 7795137Abstract: When a tungsten film (43) is embedded inside of a conductive groove (4A) formed in a wafer (W2) and a silicon oxide film (36) thereon and having a high aspect ratio, film formation and etch back of the tungsten film (43) are successively performed in a chamber of the same apparatus, therefore, a film thickness of the tungsten film (43) deposited in one film formation step is made to be thin. Whereby problems, such as exfoliation of the tungsten film (43), generation of micro-cracks, and occurrence of warpage and cracks of the wafer (W2), are avoided.Type: GrantFiled: August 25, 2006Date of Patent: September 14, 2010Assignees: Hitachi, Ltd., Honda Motor Co., Ltd.Inventors: Toshio Saito, Akira Otaguro, Manabu Otake, Yoshiya Takahira, Namio Katagiri, Nobuaki Miyakawa
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Patent number: 7777346Abstract: In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and contact hole so that its film thickness increases from the center of the bottom of the hole toward the sidewalls all around the bottom of the contact hole, a copper film is formed over the barrier film, and a second-level interconnect and a connector portion (plug) are formed by polishing by CMP. In this way, the geometrically shortest pathway of an electrical current flowing from the second-level interconnect toward the first-level interconnect through a connector portion (plug) does not coincide with a thin barrier film portion which has the lowest electrical resistance, so that the current pathway can be dispersed and a concentration of electrons does not occur readily.Type: GrantFiled: December 30, 2008Date of Patent: August 17, 2010Assignee: Renesas Electronics Corp.Inventors: Kensuke Ishikawa, Tatsuyuki Saito, Masanori Miyauchi, Toshio Saito, Hiroshi Ashihara
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Publication number: 20100090307Abstract: A structure obtaining a desired integrated circuit by sticking together a plurality of semiconductor substrates and electrically connecting integrated circuits formed on semiconductor chips of the respective semiconductor substrates is provided, and a penetrating electrode penetrating between a main surface and a rear surface of each of the semiconductor substrates and a penetrating separation portion separating the penetrating electrode are separately arranged. Thereby, after forming an insulation trench portion for formation of the penetrating separation portion on the semiconductor substrate, a MIS·FET is formed, and then, a conductive trench portion for formation of the penetrating electrode can be formed. Therefore, element characteristics of a semiconductor device having a three-dimensional structure can be improved.Type: ApplicationFiled: August 25, 2006Publication date: April 15, 2010Inventors: Satoshi Moriya, Toshio Saito, Goichi Yokoyama, Tsuyoshi Fujiwara, Hidenori Sato, Nobuaki Miyakawa
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Patent number: 7664270Abstract: Provided are a three-dimensional audio signal processing system using a rigid sphere and a method thereof. The three-dimensional audio signal processing system of the present research simplifies the shape of a human head into a rigid sphere, acquires three-dimensional audio signals by setting up mikes on the rigid sphere, and applies the acquire three-dimensional audio signals to diverse existing reproduction systems. The system includes a three-dimensional audio signal acquiring unit for acquiring audio signals by using a predetermined number of mikes set up on the rigid sphere; and a three-dimensional audio signal post-processing unit for converting the acquired audio signals to reproduce in diverse reproduction environments such as five-channel, four-channel, headphone, stereo, and stereo dipole reproduction environments.Type: GrantFiled: October 22, 2004Date of Patent: February 16, 2010Assignees: Electronics and Telecommunications Research Institute, Dimagic Co., Ltd.Inventors: Tae-Jin Lee, Dae-Young Jang, Kyeongok Kang, Chieteuk Ahn, Jin-Woong Kim, Hareo Hamada, Toshio Saito
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Publication number: 20100015797Abstract: When a tungsten film (43) is embedded inside of a conductive groove (4A) formed in a wafer (W2) and a silicon oxide film (36) thereon and having a high aspect ratio, film formation and etch back of the tungsten film (43) are successively performed in a chamber of the same apparatus, therefore, a film thickness of the tungsten film (43) deposited in one film formation step is made to be thin. Whereby problems, such as exfoliation of the tungsten film (43), generation of micro-cracks, and occurrence of warpage and cracks of the wafer (W2), are avoided.Type: ApplicationFiled: August 25, 2006Publication date: January 21, 2010Inventors: Toshio Saito, Akira Otaguro, Manabu Otake, Yoshiya Takahira, Namio Katagiri, Nobuaki Miyakawa
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Patent number: 7650000Abstract: The input signal X of one channel is divided by a multi-stage delay processing device Z?1 and each of the outputs is superimposed by a specified coefficient by a coefficient processing device W0, W1, . . . , Wk. The results are added by an adder, thereby providing a correlation eliminating filter for extracting a signal component from the input signal X of one channel having a high correlation with the input signal Y of the other channel. There is provided a coefficient updating processing device 5 for successively changing the feature of the correlation eliminating filter according to an error signal e obtained from the output signal RES and the input signal Y from the other channel, and the input signal X of one channel. A surround signal is obtained from a difference between the output RES from the correlation eliminating filter and the input signal Y of the other channel.Type: GrantFiled: September 10, 2002Date of Patent: January 19, 2010Assignee: Dimagic Co., Ltd.Inventors: Kazuhiro Kawana, Toshio Saito, Hareo Hamada, Noriyuki Hanawa
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Patent number: 7569476Abstract: In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and contact hole so that its film thickness increases from the center of the bottom of the hole toward the sidewalls all around the bottom of the contact hole, a copper film is formed over the barrier film, and a second-level interconnect and a connector portion (plug) are formed by polishing by CMP. In this way, the geometrically shortest pathway of an electrical current flowing from the second-level interconnect toward the first-level interconnect through a connector portion (plug) does not coincide with a thin barrier film portion which has the lowest electrical resistance, so that the current pathway can be dispersed and a concentration of electrons does not occur readily.Type: GrantFiled: June 1, 2006Date of Patent: August 4, 2009Assignee: Renesas Technology Corp.Inventors: Kensuke Ishikawa, Tatsuyuki Saito, Masanori Miyauchi, Toshio Saito, Hiroshi Ashihara
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Publication number: 20090174080Abstract: In order to improve the manufacturing yield of a semiconductor device having a three-dimensional structure in which a plurality of chips are stacked and attached to each other, the opening shape of each of conductive grooves (4A) formed in each chip (C2) obtained from a wafer (W2) is rectangular, and the number of the conductive grooves (4A) whose long-sides are directed in a Y direction and the number of the conductive grooves (4A) whose long-sides are directed in an X direction perpendicular to the Y direction are made to be approximately equal to each other number in the entire wafer (W2), whereby the film stress upon embedding of a conductive film into the interior of the conductive grooves is reduced, and generation of exfoliation and micro-cracks in the conductive film or warpage and cracks of the wafer (W2) are prevented.Type: ApplicationFiled: August 25, 2006Publication date: July 9, 2009Inventors: Toshio Saito, Satoshi Moriya, Morio Nakamura, Goichi Yokoyama, Tatsuyuki Saito, Nobuaki Miyakawa