Abstract: An emergency wireless connection system which operates as a normal information terminal in normal times and operates as a terminal to send and receive emergency information in emergency situation includes a line detection unit which detects an emergency communication network capable of communicating when emergency situation occurs, and a control unit which makes the emergency wireless connection system conform to a procedure of the emergency communication network based on channel information of the emergency communication network detected by the line detection unit.

Abstract: A canister includes a canister case having an adsorbent chamber, an adsorbent housed in the adsorbent chamber of the canister case, a filter disposed between the adsorbent chamber and a port mounted on an end wall of the adsorbent chamber, and a tentative filter engaging projection provided in the adsorbent chamber. The filter is loosely fitted within the adsorbent chamber and then welded on the end wall of the adsorbent chamber. The tentative filter engaging projection tentatively holds the filter loosely fitted within the adsorbent chamber in a welding step of the filter.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: The present invention provides a refrigerating machine oil, a compressor oil composition, a hydraulic oil composition, a metalworking oil composition, a heat treating oil composition, a lubricating oil composition for machine tools and a lubricating oil composition which comprise a lubricating oil base oil having % CA of not more than 2, % CP/% CN of not less than 6 and an iodine value of not more than 2.5.

Abstract: There is provided a portable electronic device capable of being immediately operated without the use of a battery even when the battery reaches exhaustion. An electricity generating unit 131 is embedded in the portable electronic device. The electricity generating unit 131 has a mechanism to pull out a pull line 113 wound around a pulley 135 to wind up a spiral spring 133 and a mechanism to transfer torque occurring when the spiral spring 133 is released and to rotate the motor at high speed. An output voltage from the motor 142 is adjusted and smoothed by a constant voltage circuit and is directly supplied as power to power consuming components. The portable electronic device connecting two flips can wind up the spiral spring 133 by opening and closing the two flips.

Abstract: An information processing apparatus and a method of controlling the same that employs a register window system and a Simultaneous Multithreading method for reducing circuit areas by sharing a data transfer bus between threads, said bus connecting a master register and a work register provided for each thread and for avoiding interference in instruction execution with other threads caused by a conflict between accesses to a register between threads. An information processing apparatus and a method of controlling the information processing apparatus employing a register window system for register reading, in which a master register and a work register are held for each thread and a bus for transferring data from the master to the work register is shared by threads in order to realize Simultaneous Multithreading.

Abstract: A processing unit includes a plurality of thread execution units each provided with a performance analysis circuit for measuring various types of events resulting from execution of instructions and a commit stack entry unit for controlling the completion of executed instructions and each executing a thread having a plurality of instructions, a commit scope register for storing instructions of completion candidates stored in each commit stack entry unit by execution by each thread execution unit and performing processing for completion of instructions included in the thread, and a thread selecting means for sending commit events of the instructions to a performance analysis circuit provided in each thread execution unit corresponding to the instructions when performing commit processing for instructions stored in the commit scope register.

Abstract: A processor device having a reservation station (RS) is concerned. In case the processor device has plural RS, the RS is associated with an arithmetic pipeline, and two RS make a pair. When one RS of the pair cannot dispatch an instruction to an associated arithmetic pipeline, the other RS dispatches the instruction to that arithmetic pipeline, or delivers its held instruction to the one RS. In case one RS is equipped, plural entries in the RS are divided into groups, and by dynamically changing this grouping according to the dispatch frequency of the instruction to the arithmetic pipelines or the held state of the instructions, the arithmetic pipelines are efficiently utilized. Incidentally, depending on the grouping of the plural entries in the RS, a configuration as if the plural RS were allocated to each arithmetic pipeline may be realized.

Abstract: An instruction processing apparatus includes a thread execution processing section executing threads each including plural instructions, a register file including a register window having plural registers, a current window pointer indicating a position of the register where the register window is possible to be inputted and outputted, a current register reading data held by the register window designated by the current window pointer to hold the data and a replacement buffer holding data transferred from the register file to the current register, a first transfer path transferring data in a register file to one of the replacement buffer, a second data transfer transferring data in a replacement buffer to one of the current registers, a calculation section executing a switching instruction of the register window, and a control section controlling, if the calculation section executes the switching instruction, the first data transfer path and the second data transfer path.

Abstract: An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. And the instruction execution control device has a thread selection circuit (30) which detects a state where an instruction has not been completed for a predetermined period during simultaneous multi-thread operation, and controls such that all the reservation stations (5, 6 and 7) can execute only a predetermined thread. Therefore if an entry that cannot be executed from the reservation stations (5, 6 and 7) exists, execution of an entry in the thread that cannot be executed can be enabled by stopping the execution of the thread which has been executed continuously.

Abstract: An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. The device has architecture registers (22-0, 22-1) for each thread, and a selection circuit (32, 24) which, when an operand data required for executing a function is read from a register file (20), selects in advance a thread to be read from the register file (20). This makes it possible to select an architecture register at an early stage, and although the number of circuits in a portion for selecting the architecture registers increases, the wiring amount of the circuits can be decreased, because the architecture register of the thread to be read is selected in advance.

Abstract: A processor capable of executing conditional store instructions without being limited by the number of condition codes is provided. Condition data is stored in floating-point registers, and an operation unit executes a conditional floating-point store instruction of determining whether to store, in cache, store data.

Abstract: Multiple data processing instructions instruct a computing device to process multiple data including first data and second data. When a multiple data processing instruction is decoded, two allocatable registers are selected. One is used to store the result of a processing operation performed on first data by one processing unit, and the other is used to store the result of a processing operation performed on second data by another processing unit. Those stored processing results are then transferred to result registers. Normal data processing instructions, on the other hand, instruct a processing operation on third data. When a normal data processing instruction is decoded, one allocatable register is selected and used to store the result of processing that a processing unit performs on the third data. The stored processing result is then transferred to a result register.

Abstract: A lubricating oil composition comprising a lubricating base oil, and a mixture and/or a reaction product of (A) 0.01-0.5% by mass of at least one compound selected from among acid phosphates represented by formula (1) or formula (2), and (B) 0.01-2% by mass of an alkylamine represented by formula (3), based on the total weight of the composition, wherein the acid value due to component (A) is 0.1-1.0 mgKOH/g. [R1 and R2 represent hydrogen or straight-chain alkyl or straight-chain alkenyl groups, with at least one of R1 and R2 being a C6-12 straight-chain alkyl or straight-chain alkenyl group; R3 and R4 represent hydrogen straight-chain alkyl or straight-chain alkenyl groups, with at least one of R3 and R4 being a C13-18 straight-chain alkyl or straight-chain alkenyl group; and R5 and R6 represent hydrogen or C4-30 branched-chain alkyl groups, with at least one of R5 and R6 being a branched-chain alkyl group.

Abstract: A priority circuit is connected to a reservation station and a plurality of arithmetic units that processes different operations and dispatches, when it is determined that an executable flag indicating that an instruction can be executed by only a specific arithmetic unit is on, an instruction to an arithmetic unit that is different from the specific arithmetic unit and of which a queue is vacant in accordance with the input performed by an instruction decoder and the reservation station.

Abstract: A processor includes a storage unit storing an instruction, an instruction extension information register that includes a first area and a second area, an instruction decoding unit that decodes a first prefix instruction including first extension information extending an immediately following instruction written to the first area when the first prefix instruction is executed, and that decodes a second prefix instruction including the first extension information and a second extension information extending an instruction after two instructions written to the second area respectively, an instruction packing unit that generates a packed instruction including at least one of the first prefix instruction or the second prefix instruction, and the instruction immediately following the first prefix instruction or the second prefix instruction when the instruction decoding unit decodes the first prefix instruction or the second prefix instruction, an instruction execution unit that executes the packed instruction gene