Patents by Inventor Toshiyuki Toyoshima
Toshiyuki Toyoshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145175Abstract: A passive component includes an inorganic substrate having a first main surface and a second main surface, which are opposed to each other, and contains a semiconductor material; and a passive element portion on the first main surface of the inorganic substrate so as to be in contact with the first main surface. When a cross section in a plane that passes through a center of gravity in a whole of the first main surface and is orthogonal to the first main surface is defined as a first cross section, in the first cross section, the inorganic substrate has a first side surface and a second side surface, which are connected with the first main surface and opposed to each other, and each of line roughness of the first side surface and line roughness of the second side surface is larger than line roughness of the first main surface.Type: ApplicationFiled: August 18, 2023Publication date: May 2, 2024Applicant: Murata Manufacturing Co., Ltd.Inventors: Yoshimasa YOSHIOKA, Kenji TOYOSHIMA, Takaaki MIZUNO, Toshiyuki NAKAISO
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Publication number: 20230417018Abstract: Provided are a control apparatus, a control system, and a control method for controlling a work machine which reduce inadvertent contact during operation of the work machine and inhibit a decrease in operating rate. A control apparatus for controlling a work machine having a movable part includes: an acquisition means of acquiring state information indicating a posture of the work machine, action information indicating an action of the work machine, and surrounding information indicating an arrangement of a surrounding object around the work machine; a specification means of specifying, based on the state information and the action information, a safe distance that is set between the movable part and the surrounding object; and an action control means of controlling an action of the work machine in accordance with the safe distance and the surrounding information.Type: ApplicationFiled: October 29, 2021Publication date: December 28, 2023Applicant: NEC CorporationInventors: Daisuke OHTA, Yusuke Kakuno, Toshiyuki Toyoshima
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Patent number: 8674046Abstract: A low dielectric constant material having an excellent water resistance obtained by heat-treating a borazine compound of the formula (1-2): or an inorganic or organic compound having a group derived from the borazine compound (1-2) to undergo a condensation reaction, thereby producing an oligomer or polymer, wherein R1 to R6 are independently a hydrogen atom, an alkyl group having 1 to 20 carbon atoms, an aryl group, a substituted aryl group, an alkenyl group, an amino group, an alkylamino group, an alkoxyl group, a thioalkoxyl group, a carbonyl group, a silyl group, an alkylsilyl group, a phosphino group, an alkylphosphino group, or a group of the formula: Si(OR7)(OR8)(OR9), and at least one of R1 to R6 is not hydrogen atom.Type: GrantFiled: September 14, 2009Date of Patent: March 18, 2014Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideharu Nobutoki, Teruhiko Kumada, Toshiyuki Toyoshima, Naoki Yasuda, Suguru Nagae
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Publication number: 20100004425Abstract: A low dielectric constant material having an excellent water resistance obtained by heat-treating a borazine compound of the formula (1-2): or an inorganic or organic compound having a group derived from the borazine compound (1-2) to undergo a condensation reaction, thereby producing an oligomer or polymer, wherein R1 to R6 are independently a hydrogen atom, an alkyl group having 1 to 20 carbon atoms, an aryl group, a substituted aryl group, an alkenyl group, an amino group, an alkylamino group, an alkoxyl group, a thioalkoxyl group, a carbonyl group, a silyl group, an alkylsilyl group, a phosphino group, an alkylphosphino group, or a group of the formula: Si(OR7)(OR8)(OR9), and at least one of R1 to R6 is not hydrogen atom.Type: ApplicationFiled: September 14, 2009Publication date: January 7, 2010Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Hideharu Nobutoki, Teruhiko Kumada, Toshiyuki Toyoshima, Naoki Yasuda, Suguru Nagae
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Publication number: 20060246380Abstract: A micropattern forming material is formed on a resist pattern containing an acidic group. The micropattern forming material comprises a compound that penetrates the resist pattern. The penetration of the compound causes the resist pattern to form a crosslinked layer and thereby swell resulting in formation of a film insoluble in water or alkali.Type: ApplicationFiled: February 15, 2006Publication date: November 2, 2006Applicant: Renesas Technology Corp.Inventors: Mamoru Terai, Toshiyuki Toyoshima, Takeo Ishibashi, Shinji Tarutani
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Patent number: 7100275Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.Type: GrantFiled: July 20, 2004Date of Patent: September 5, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Satoshi Yanaura, Yasuo Furuhashi, Hirofumi Fujioka
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Via-filling material and process for fabricating semiconductor integrated circuit using the material
Patent number: 7030007Abstract: A via-filling material includes a polymer containing a repeating unit represented by wherein R1 one of hydrogen, fluorine, chlorine, bromine, and methyl group; R2 is one of hydrogen, a C1-3 alkyl group, and a C1-4 alkyl group in which the hydrogen is replaced by at least one of fluorine, chlorine, and bromine; and X is —C(?O)O— or —S(?O)2O—. This via-filling material does not generate deposits around an opening of a via hole during plasma etching and provides a semiconductor integrated circuit with high reliability, even when a trench wider than the via hole is formed by plasma etching around the via hole filled with the via-filling material.Type: GrantFiled: July 22, 2003Date of Patent: April 18, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Teruhiko Kumada, Toshiyuki Toyoshima, Hideharu Nobutoki, Takeo Ishibashi, Yoshiharu Ono, Junjiro Sakai -
Publication number: 20050181628Abstract: A process for preparing a low dielectric constant material comprising heat-treating a compound containing a borazine skeleton structure of the formula: wherein at least one of R1 to R6 is a bond which binds said borazine skeleton structure to a molecule of a inorganic or organic compound, and/or R1 to R6 are independently a hydrogen atom, an alkyl group having 1 to 20 carbon atoms, an aryl group, a substituted aryl group, an alkenyl group, an amino group, an alkylamino group, an alkoxyl group, a thioalkoxyl group, a carbonyl group, a silyl group, an alkylsilyl group, a phosphino group, an alkylphosphino group or a group of the formula: Si(OR7)(OR8)(OR9), and at least one of R1 to R6 is not a hydrogen atom.Type: ApplicationFiled: April 18, 2005Publication date: August 18, 2005Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Hideharu Nobutoki, Teruhiko Kumada, Toshiyuki Toyoshima, Naoki Yasuda, Suguru Nagae
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Patent number: 6924240Abstract: A low dielectric constant material having excellent water resistance comprising a borazine skeleton structure represented by any one of the formulas (2) to (4): wherein R1 to R4 are independently a hydrogen atom, an alkyl group having 1 to 20 carbon atoms, an aryl group, a substituted aryl group, an alkenyl group, an alkylamino group, an alkoxyl group, a thioalkoxyl group, a carbonyl group, a silyl group, an alkylsilyl group, a phosphino group, an alkyiphosphino group, or a group of the formula: Si(OR7)(OR8)(OR9), provided that at least one of R1 to R4 is not a hydrogen atom.Type: GrantFiled: October 9, 2002Date of Patent: August 2, 2005Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideharu Nobutoki, Teruhiko Kumada, Toshiyuki Toyoshima, Naoki Yasuda, Suguru Nagae
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Via-filling material and process for fabricating semiconductor integrated circuit using the material
Publication number: 20050101123Abstract: A via-filling material includes a polymer containing a repeating unit represented by wherein R1 one of hydrogen, fluorine, chlorine, bromine, and methyl group; R2 is one of hydrogen, a C1-3 alkyl group, and a C1-4 alkyl group in which the hydrogen is replaced by at least one of fluorine, chlorine, and bromine; and X is —C(?O)O or —S(?O)2O—. This via-filling material does not generate deposits around an opening of a via hole during plasma etching and provides a semiconductor integrated circuit with high reliability, even when a trench wider than the via hole is formed by plasma etching around the via hole filled with the via-filling material.Type: ApplicationFiled: July 22, 2003Publication date: May 12, 2005Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Teruhiko Kumada, Toshiyuki Toyoshima, Hideharu Nobutoki, Takeo Ishibashi, Yoshiharu Ono, Junjiro Sakai -
Publication number: 20050003076Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.Type: ApplicationFiled: July 20, 2004Publication date: January 6, 2005Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Satoshi Yanaura, Yasuo Furuhashi, Hirofumi Fujioka
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Patent number: 6774314Abstract: An electronic device assembled using a coupler which has an electroconductive region and a resin region on the surface. Flexibility of the resin region absorbs stress caused by difference in thermal expansion coefficient between an organic printed circuit board and a semiconductor chip through the deformation of the electroconductive region. As a result, formation of cracking in the coupler is avoided. It is preferable that the resin region occupies from 20 to 80% of the total surface area of the coupler. The coupler may be formed from a molten blend of the heat resistant resin and a joining metal. The coupler may also be formed by molding a blend of the heat resistant resin and metal powder, wherein the metal powder locating on the surface of the coupler have a joining metal joined thereto.Type: GrantFiled: December 14, 2001Date of Patent: August 10, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Suguru Nagae
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Publication number: 20040072096Abstract: A micropattern forming material comprising a water-soluble component, water and/or an organic solvent miscible with water is used. The water-soluble component is made of at least one selected from the group water-soluble monomers, water-soluble oligomers, copolymers of water-soluble monomers and salts thereof, having a functional group reactable with a carboxyl group. The micropattern forming material is formed on a resist pattern 4 capable of supplying an acid, and a film 6 insoluble in water or an alkali is formed through crosslinking reaction of the water-soluble component at a portion in contact with the resist pattern 4 by the action of the acid from the resist pattern.Type: ApplicationFiled: August 15, 2003Publication date: April 15, 2004Applicant: Renesas Technology Corp.Inventors: Mamoru Terai, Toshiyuki Toyoshima, Takeo Ishibashi, Shinji Tarutani
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Patent number: 6699748Abstract: A method of fabricating a capacitor includes selectively forming a positive photosensitive resin layer on a first conductive layer; exposing the positive photosensitive resin layer, immersing the exposed positive photosensitive resin layer in a solution in which dielectric particles are dispersed and diffusing the dielectric particles into the positive photosensitive resin layer; forming an insulating resin layer covering side faces of the positive photosensitive resin layer; and forming a second conductive layer on the positive photosensitive resin layer. According to the method, a very reliable capacitor having excellent electrical characteristics, such as dielectric strength, can be cheaply and easily fabricated in a wiring layer.Type: GrantFiled: November 26, 2002Date of Patent: March 2, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Hirofumi Fujioka
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Publication number: 20040029047Abstract: A micropattern forming material comprises a polar change material formed on a resist pattern capable of generating an acid, the polar change material being soluble in water or an alkali, a portion of the polar change material in contact with the resist pattern undergoing a polar change caused by the acid from the resist pattern to form an insolubilized film insoluble in water and the alkali; and water or a mixed solvent of water and a water-soluble organic solvent.Type: ApplicationFiled: May 13, 2003Publication date: February 12, 2004Applicant: Renesas Technology Corp.Inventors: Takeo Ishibashi, Toshiyuki Toyoshima, Mamoru Terai, Shinji Tarutani
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Publication number: 20040018646Abstract: A resist pattern formation method is characterized in that, after a resist pattern is formed on a wafer, a residue generated between resist sidewalls forming the resist pattern is irradiated with an electron beam under a reduced pressure. It is also preferable to detect the residue with pattern defect inspection equipment, and irradiate the detected residue site with an electron beam under a reduced pressure using an electron microscope. The reduced pressure is preferably equal to or lower than 5.0×102 Pa, and an acceleration voltage is preferably equal to or lower than 1200 V. A manufacturing method of a semiconductor device according to the present invention uses the above-described formation method to form a resist pattern. Thus, the residue generated between resist sidewalls can be removed without varying a dimension of a resist pattern spacing.Type: ApplicationFiled: January 2, 2003Publication date: January 29, 2004Applicants: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Shinji Tarutani, Toshiyuki Toyoshima, Takeo Ishibashi, Yuuko Odamura, Naoki Yasuda
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Publication number: 20030224568Abstract: A capacitor fabricating method of the present invention includes the steps of: selectively forming a positive photosensitive resin layer on a first conductive layer; exposing the positive photosensitive resin layer, thereby obtaining an exposed positive photosensitive resin layer; immersing the exposed positive photosensitive resin layer in a solution in which dielectric particles are dispersed to diffuse the dielectric particles into the positive photosensitive resin layer; forming an insulating resin layer so as to cover side faces of the positive photosensitive resin layer; and forming a second conductive layer on the positive photosensitive resin layer. According to the method, a very reliable capacitor having excellent electric characteristics such as dielectric strength characteristic can be cheaply and easily fabricated in a wiring layer.Type: ApplicationFiled: November 26, 2002Publication date: December 4, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Toshiyuki Toyoshima, Hirofumi Fujioka
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Patent number: 6579657Abstract: A resist pattern, containing a material capable of generating an acid by exposure to light, is covered with a resist containing a material capable of crosslinkage in the presence of an acid. The acid is generated in the resist pattern by application of heat or by exposure to light, and a crosslinked layer is formed at the interface as a cover layer for the resist pattern, thereby causing the resist pattern to be thickened. Thus, the hole diameter of the resist pattern can be reduced, or the isolation width of a resist pattern can be reduced.Type: GrantFiled: March 27, 1998Date of Patent: June 17, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takeo Ishibashi, Toshiyuki Toyoshima, Keiichi Katayama, Ayumi Minamide
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Publication number: 20030100175Abstract: A low dielectric constant material having an excellent water resistance obtained by heat-treating a borazine compound of the formula (1-2): 1Type: ApplicationFiled: October 9, 2002Publication date: May 29, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Hideharu Nobutoki, Teruhiko Kumada, Toshiyuki Toyoshima, Naoki Yasuda, Suguru Nagae
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Patent number: 6568996Abstract: The object of the present invention is to provide a polishing agent for processing semiconductor, which can control coagulation and sedimentation and has stable and re-productive polishing properties under a proper dispersing condition to prevent generation of polishing flaw. The polishing agent for processing semiconductor comprises a compound having glucose structure, polishing particles and water.Type: GrantFiled: April 19, 2001Date of Patent: May 27, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshio Kobayashi, Toshiyuki Toyoshima, Suguru Nagae, Masanobu Iwasaki, Kouichirou Tsutahara, Shin Hasegawa