Abstract: An electronic device assembled using a coupler which has an electroconductive region and a resin region on the surface. Flexibility of the resin region absorbs stress caused by difference in thermal expansion coefficient between an organic printed circuit board and a semiconductor chip through the deformation of the electroconductive region. As a result, formation of cracking in the coupler is avoided. It is preferable that the resin region occupies from 20 to 80% of the total surface area of the coupler. The coupler may be formed from a molten blend of the heat resistant resin and a joining metal. The coupler may also be formed by molding a blend of the heat resistant resin and metal powder, wherein the metal powder locating on the surface of the coupler have a joining metal joined thereto.

Abstract: The object of the present invention is to provide a polishing agent for processing semiconductor, which can control coagulation and sedimentation and has stable and re-productive polishing properties under a proper dispersing condition to prevent generation of polishing flaw. The polishing agent for processing semiconductor comprises a compound having glucose structure, polishing particles and water.

Abstract: There is described a method of producing a pure resist pattern having superior topography smaller than the limit of wavelength of exposure light. A first resist pattern containing material capable of producing an acid on exposure to light is coated with a second resist containing material which causes a crosslinking reaction in the presence of an acid. An acid is produced in the resist pattern by exposing the pattern to light, thus forming a crosslinked layer along the boundary surface between the first resist pattern and the second resist. As a result, a second resist pattern which is greater than the first resist pattern is formed. Minute pure resist patterns are produced through two-step processing: that is, by removing the second resist from the substrate through use of a liquid prepared by dissolving an organic solvent into water and by rinsing the substrate with water. The diameter of holes formed in the resist or the interval between isolated patterns can be reduced.

Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.

Abstract: There is described a method of stably manufacturing a fine resist pattern narrower than the wavelength of exposing light from a stepper. Under the method, a resist pattern is formed on a semiconductor substrate through use of an acid catalyst chemically-amplified photoresist, and an organic film which includes an acid or which produces an acid on exposure to light is formed on the surface of the semiconductor substrate including the resist pattern. The organic film is then subjected to a heat treatment to thereby diffuse an acid. The surface layer of the resist pattern is made soluble in an alkaline developer, and the surface layer of the resist pattern is removed through use of the alkaline developer. As a result, a fine resist pattern is formed.

Abstract: A first resist pattern, which is capable of generating an acid, is formed on a semiconductor device layer. Over the first resist pattern, a layer of a second resist, which is capable of undergoing an cross-linking reaction in the presence of an acid, is formed. Then, a cross-linked film is formed in portions of said layer of the second resist at the boundary with said first resist by action of an acid from said first resist. Thereafter, non-cross-linked portions of said second resist are removed to form a finely isolated resist pattern. The semiconductor device layer is etched, via a mask of said finely isolated resist pattern, to form a fine spaces or holes.