Patents by Inventor Tsung-Hsien Tsai

Tsung-Hsien Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11545983
    Abstract: Systems and methods are provided for a phase locked loop. A phase/frequency detector is configured to receive a reference signal and a feedback signal. A charge pump is configured to receive outputs from the phase/frequency detector and to generate pulses. An oscillator is configured to generate an output waveform based on the charge pump pulses. A realignment path is configured to generate a clock realignment signal that is provided to the oscillator based on the outputs from the phase/frequency detector.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: January 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 11539355
    Abstract: Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: December 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ruey-Bin Sheen, Ming Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai
  • Patent number: 11539354
    Abstract: Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: December 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ruey-Bin Sheen, Ming Hsien Tsai, Chih-Hsien Chang, Tsung-Hsien Tsai
  • Publication number: 20220407527
    Abstract: Systems, devices, and methods are described herein for aligning a phase of a ring oscillator and removing jitter. An oscillator includes a resistor bank array, an operational amplifier, a first and second transistor, and a realignment circuit. The resistor bank array has a plurality of resistors configured to generate a first signal. The operational amplifier is coupled to a PLL circuit and is configured to compare a voltage of the PLL circuit with a voltage of the resistor bank array. The first transistor is coupled between the operational amplifier and a ring oscillator. The first transistor is configured to generate a second signal to control a frequency of the ring oscillator during a realignment state. The realignment circuit is coupled to the first transistor and the ring oscillator. The realignment circuit is configured to generate a realignment signal to align the ring oscillator with a first clock signal.
    Type: Application
    Filed: July 15, 2022
    Publication date: December 22, 2022
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 11532568
    Abstract: An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 20, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Yu-Wei Yeh, Tsung-Hsien Tsai, Chi-Liang Shih, Sheng-Ming Yang, Ping-Hung Liao
  • Patent number: 11529083
    Abstract: A physiological status evaluation method and a physiological status evaluation apparatus are provided. The method includes the following: obtaining original electrocardiogram data of a user by an electrocardiogram detection apparatus; converting the original electrocardiogram data into digital integration data; obtaining a plurality of physiological characteristic parameters according to the digital integration data; filtering the physiological characteristic parameters for at least one notable characteristic parameter through at least one filter model, where decision importance of the at least one notable characteristic parameter in a decision process of the at least one filter model is greater than a threshold; building a prediction model according to the at least one notable characteristic parameter; and evaluating a physiological status of the user through the prediction model.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: December 20, 2022
    Assignees: Acer Incorporated, Taipei Veterans General Hospital, Acer Medical Inc.
    Inventors: Chun-Hsien Li, Tsung-Hsien Tsai, Jun-Hong Chen, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Patent number: 11494698
    Abstract: A method and an electronic device for selecting influence indicators by using an automatic mechanism are provided. The method includes following steps. Raw data is obtained, where the raw data includes a body-related variable and a plurality of to-be-measured indicators corresponding to the body-related variable. The body-related variable is set as a target parameter. The body-related variable and the to-be-measured indicators are input into a plurality of validation models, and the to-be-measured indicators are sorted according an output result of the validation models to obtain ranking data. Importance of the to-be-measured indicators is calculated by using a screening condition according to the ranking data, so as to select a candidate indicator from the to-be-measured indicators. An influence indicator is determined by calculating a correlation between the candidate indicator and the body-related variable.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: November 8, 2022
    Assignees: Acer Incorporated, National Yang-Ming University
    Inventors: Zong-Han Tsai, Tsung-Hsien Tsai, Liang-Kung Chen, Li-Ning Peng, Ting-Fen Tsai, Chi-Hung Lin, Chien-Yi Tung, Wei-Ju Lin
  • Patent number: 11489530
    Abstract: Digital delay lock circuits and methods for operating digital delay lock circuits are provided. A phase detector is configured to receive first and second clock signals and generate a digital signal indicating a relationship between a phase of the first clock signal and a phase of the second clock signal. A phase accumulator circuit is configured to receive the digital signal and generate a phase signal based on values of the digital signal over multiple clock cycles. A decoder is configured to receive the phase signal and generate a digital control word based on the phase signal. A delay element is configured to receive the digital control word. The delay element is further configured to change the relationship between the phase of the first clock signal and the phase of the second clock signal by modifying the phase of the second clock signal according to the digital control word.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tsung-Hsien Tsai, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 11476572
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: October 18, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Publication number: 20220285029
    Abstract: A medication risk evaluation method and a medication risk evaluation device are provided. The medication risk evaluation method includes: obtaining first medication route information related to a first medicine combination in a medication database; obtaining second medication route information related to a second medicine combination in the medication database; obtaining overlapping medication information between the first medication route information and the second medication route information; determining whether the overlapping medication information meets a noise exclusion condition; and if the overlapping medication information meets the noise exclusion condition, establishing a risk evaluation model based on other medication route information in the medication database excluding the first medication route information, where the risk evaluation model is adapted to evaluate a risk of using at least one medicine in the medication database.
    Type: Application
    Filed: July 5, 2021
    Publication date: September 8, 2022
    Applicants: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Pei-Jung Chen, Tsung-Hsien Tsai, Liang-Kung Chen, Shih-Tsung Huang, Fei-Yuan Hsiao
  • Publication number: 20220266152
    Abstract: A teammate recommendation method for a multiplayer online game is proposed. The teammate recommendation method includes the steps of: determining one or more characteristic values for each of a plurality of players based on past game performance information of the players; dividing the players into a plurality of groups based on the characteristic values of the players; determining a Key Performance Indicator (KPI) for each of a plurality of combinations of the groups based on teammate information and team ranking of each game in the past game performance information; selecting one of the combinations, which includes a first group that the first player belongs to, based on the KPIs of the combinations; and recommending one or more second players based on the selected combination.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 25, 2022
    Inventors: Chun-Hsien LI, Sheng-Wei CHU, Chia-Shang YUAN, Jun-Hong CHEN, Te-Chung HUANG, Tsung-Hsien TSAI, Yueh-Yarng TSAI, Pin-Cyuan LIN
  • Patent number: 11424751
    Abstract: Systems, devices, and methods are described herein for aligning a phase of a ring oscillator and removing jitter. An oscillator includes a resistor bank array, an operational amplifier, a first and second transistor, and a realignment circuit. The resistor bank array has a plurality of resistors configured to generate a first signal. The operational amplifier is coupled to a PLL circuit and is configured to compare a voltage of the PLL circuit with a voltage of the resistor bank array. The first transistor is coupled between the operational amplifier and a ring oscillator. The first transistor is configured to generate a second signal to control a frequency of the ring oscillator during a realignment state. The realignment circuit is coupled to the first transistor and the ring oscillator. The realignment circuit is configured to generate a realignment signal to align the ring oscillator with a first clock signal.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: August 23, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Publication number: 20220239298
    Abstract: Systems and methods are provided for a phase locked loop. A phase/frequency detector is configured to receive a reference signal and a feedback signal. A charge pump is configured to receive outputs from the phase/frequency detector and to generate pulses. An oscillator is configured to generate an output waveform based on the charge pump pulses. A realignment path is configured to generate a clock realignment signal that is provided to the oscillator based on the outputs from the phase/frequency detector.
    Type: Application
    Filed: January 27, 2021
    Publication date: July 28, 2022
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 11386352
    Abstract: A system of training behavior labeling model is provided. Specifically, a processing unit inputs each data of a training data set into a plurality of learning modules to establish a plurality of labeling models. The processing unit obtains a plurality of second labeling information corresponding to each data of a verification data set and generates a behavior labeling result according to the second labeling information corresponding to each data of the verification data set. The processing unit obtains a labeling change value according to the behavior labeling result and first labeling information corresponding to each data of the verification data set. The processing unit, if determining that the labeling change value is greater than a change threshold, updates the first labeling information according to the behavior labeling results, exchanges the training data set and the verification data set and reestablishes the labeling models.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: July 12, 2022
    Assignee: Acer Cyber Security Incorporated
    Inventors: Chun-Hsien Li, Yin-Hsong Hsu, Chien-Hung Li, Tsung-Hsien Tsai, Chiung-Ying Huang, Ming-Kung Sun, Zong-Cyuan Jhang
  • Publication number: 20220216876
    Abstract: Digital delay lock circuits and methods for operating digital delay lock circuits are provided. A phase detector is configured to receive first and second clock signals and generate a digital signal indicating a relationship between a phase of the first clock signal and a phase of the second clock signal. A phase accumulator circuit is configured to receive the digital signal and generate a phase signal based on values of the digital signal over multiple clock cycles. A decoder is configured to receive the phase signal and generate a digital control word based on the phase signal. A delay element is configured to receive the digital control word. The delay element is further configured to change the relationship between the phase of the first clock signal and the phase of the second clock signal by modifying the phase of the second clock signal according to the digital control word.
    Type: Application
    Filed: November 22, 2021
    Publication date: July 7, 2022
    Inventors: Tsung-Hsien Tsai, Ya-Tin Chang, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Publication number: 20220208383
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Application
    Filed: July 2, 2021
    Publication date: June 30, 2022
    Applicants: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Publication number: 20220202339
    Abstract: An electronic device and a method for predicting a blockage of a coronary artery are provided. The method includes: obtaining multiple pieces of electrocardiogram (ECG) data respectively corresponding to a coronary artery set; generating multiple first probabilities corresponding to the multiple pieces of electrocardiogram data respectively according to the multiple pieces of electrocardiogram data and a first phase model, generating a first determined result according to the multiple first probabilities, and selecting a first data subset corresponding to a first probability subset from the multiple pieces of electrocardiogram data in response to each one in the first data subset of the multiple first probabilities being greater than a first threshold; generating multiple second probabilities corresponding to the first data subset according to the first data subset and a second phase model, and generating a second determined result according to the multiple second probabilities.
    Type: Application
    Filed: April 19, 2021
    Publication date: June 30, 2022
    Applicants: National Health Research Institutes, Chang Gung Memorial Hospital, Keelung, Acer Healthcare Inc., Acer Incorporated
    Inventors: Yun-Hsuan Chan, Chun-Hsien Li, Jun-Hong Chen, Tsung-Hsien Tsai, Ting-Fen Tsai, Chi-Hsiao Yeh
  • Publication number: 20220208326
    Abstract: A method for calculating a high risk route of administration is provided. Multiple arrangement routes composed of every two medicines among multiple medicines included in a medical record database are listed. A risk value of each arrangement route is calculated by querying the medical record database based on a specified medication result. A risk score of each arrangement route is calculated according to the risk value, and the arrangement routes are sorted based on the risk scores. Starting from the arrangement route with the highest risk score, N arrangement routes are retrieved and a combination on N of the arrangement routes is performed to obtain multiple strung routes. The number of medicines included in each strung route matches a specified medication number.
    Type: Application
    Filed: July 7, 2021
    Publication date: June 30, 2022
    Applicants: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Pei-Jung Chen, Tsung-Hsien Tsai, Liang-Kung Chen, Shih-Tsung Huang, Fei-Yuan Hsiao
  • Publication number: 20220208382
    Abstract: An electronic device and a method for screening features for predicting a physiological state are provided. The method includes: obtaining multiple physiological data corresponding to multiple features; generating multiple first subsets of the multiple features according to the multiple physiological data based on a first model, wherein the multiple first subsets respectively correspond to the multiple physiological data; selecting a first feature from the multiple features according to the multiple first subsets, calculating a first relation index of the first feature and a second feature corresponding to the multiple features, and selecting the second feature as an accompanied feature of the first feature according to the first relation index; and outputting the first feature and the accompanied feature.
    Type: Application
    Filed: April 19, 2021
    Publication date: June 30, 2022
    Applicants: National Health Research Institutes, Chang Gung Memorial Hospital, Keelung, Acer Healthcare Inc., Acer Incorporated
    Inventors: Chun-Hsien Li, Tsung-Hsien Tsai, Wei-Che Hsu, Ting-Fen Tsai, Jyh-Lyh Juang, Chi-Hsiao Yeh
  • Patent number: 11341018
    Abstract: A method for detecting abnormality adapted to detect abnormal operations of an operating system is provided. The method includes: calculating a safe range of usage of the operating system during one or more time periods according to a historical data stream; calculating abnormal ratios corresponding to the one or more time periods according to a current data stream and the safe range of usage; selecting one or more abnormal time periods from the one or more time periods according to a threshold and the abnormal ratios; calculating an abnormal indicator for each of the one or more abnormal time periods according to the historical data stream and the current data stream; and ranking the one or more abnormal time periods according to the abnormal indicator(s).
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: May 24, 2022
    Assignee: Acer Cyber Security Incorporated
    Inventors: Chun-Hsien Li, Chien-Hung Li, Jun-Mein Wu, Ming-Kung Sun, Zong-Cyuan Jhang, Yin-Hsong Hsu, Chiung-Ying Huang, Tsung-Hsien Tsai