Patents by Inventor Tsung-Liang Chen

Tsung-Liang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10720959
    Abstract: A spread spectrum based audio frequency communication system at least includes a transmitting apparatus. The transmitting apparatus includes a first dot-product module, a summation module, a transmitting modulation module, a mixture module, a digital-to-analog converter, and a transmitter. The first dot-product module is configured to perform a dot-product of a first data and a first pseudo-noise code, and derive a first spreading data. The summation module is configured to sum up the first spreading data and a second spreading data to form a summed data. The transmitting modulation module is configured to vary a carrier signal with the summed data to form a modulated signal. The mixture module is configured to mix the modulated signal and an acoustic signal up to form a mixed signal. The digital-to-analog converter is configured to convert the mixed signal into acoustic waves. The transmitter transmits the acoustic waves.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: July 21, 2020
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Yao-Chun Liu, Chun-Hung Chen, Chen-Chu Hsu, Tsung-Liang Chen
  • Patent number: 10665421
    Abstract: A system for determining various parameters of an ion beam is disclosed. A test workpiece may be modified to incorporate a detection pattern. The detection pattern may be configured to measure the height of the ion beam, the uniformity of the ion beam, or the central angle of the ion beam. In certain embodiments, the amount of current striking the detection pattern may be measured using an optical emission spectrometer (OES) system. In other embodiments, a power supply used to bias the workpiece may be used to measure the amount of current striking the detection pattern. Alternative, the detection patterns may be incorporated into the workpiece holder.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: May 26, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Tsung-Liang Chen, Kevin R. Anglin, Simon Ruffell
  • Patent number: 10637500
    Abstract: An acceleration apparatus applied in an artificial neuron is disclosed. The acceleration apparatus comprises an AND gate array, a first storage device, a second storage device and a multiply-accumulate (MAC) circuit. The AND gate array with plural AND gates receives a first bitmap and a second bitmap to generate an output bitmap. The first storage device stores a first payload and outputs a corresponding non-zero first element according to a first access address associated with a result of comparing the first bitmap with the output bitmap. The second storage device stores a second payload and outputs a corresponding non-zero second element according to a second access address associated with a result of comparing the second bitmap with the output bitmap. The MAC circuit calculates a dot product of two element sequences from the first storage device and the second storage device.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: April 28, 2020
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Chi-Hao Chen, Hong-Ching Chen, Chun-Ming Huang, Tsung-Liang Chen
  • Patent number: 10633743
    Abstract: A system and method for removing metal from a substrate in a controlled manner is disclosed. The system includes a chamber, with one or more gas inlets to allow the flow of gasses into the chamber, at least one exhaust pump, to exhaust gasses from the chamber, and a heater, capable of modifying the temperature of the chamber. In some embodiments, one or more gasses are introduced into the chamber at a first temperature. The atoms in these gasses chemically react with the metal on the surface of the substrate to form a removable compound. The gasses are then exhausted from the chamber, leaving the removable compound on the surface of the substrate. The temperature of the chamber is then elevated to a second temperature, greater than the sublimation temperature of the removable compound. This increased temperature allows the removable compound to become gaseous and be exhausted from the chamber.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: April 28, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, Benjamin Schmiege, Jeffrey W. Anthis, Glen Gilchrist
  • Publication number: 20200118790
    Abstract: A system for determining various parameters of an ion beam is disclosed. A test workpiece may be modified to incorporate a detection pattern. The detection pattern may be configured to measure the height of the ion beam, the uniformity of the ion beam, or the central angle of the ion beam. In certain embodiments, the amount of current striking the detection pattern may be measured using an optical emission spectrometer (OES) system. In other embodiments, a power supply used to bias the workpiece may be used to measure the amount of current striking the detection pattern. Alternative, the detection patterns may be incorporated into the workpiece holder.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 16, 2020
    Inventors: Tsung-Liang Chen, Kevin R. Anglin, Simon Ruffell
  • Publication number: 20200090030
    Abstract: An integrated circuit applied in a deep neural network is disclosed. The integrated circuit comprises at least one processor, a first internal memory, a second internal memory, at least one MAC circuit, a compressor and a decompressor. The processor performs a cuboid convolution over decompression data for each cuboid of an input image fed to any one of multiple convolution layers. The MAC circuit performs multiplication and accumulation operations associated with the cuboid convolution to output a convoluted cuboid. The compressor compresses the convoluted cuboid into one compressed segment and store it in the second internal memory. The decompressor decompresses data from the second internal memory segment by segment to store the decompression data in the first internal memory. The input image is horizontally divided into multiple cuboids with an overlap of at least one row for each channel between any two adjacent cuboids.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 19, 2020
    Inventors: Shen-Jui HUANG, Meng-Hsun WEN, Yu-Pao TSAI, Hsuan-Yi HOU, Ching-Hao YU, Wei-Hsiang TSENG, Chi-Wei PENG, Hong-Ching CHEN, Tsung-Liang CHEN
  • Patent number: 10534839
    Abstract: A method for matrix by vector multiplication, applied in an artificial neural network system, is disclosed. The method comprises: compressing a plurality of weight values in a weight matrix and indices of an input vector into a compressed main stream; storing M sets of synapse values in M memory devices; and, performing reading and MAC operations according to the M sets of synapse values and the compressed main stream to obtain a number M of output vectors. The step of compressing comprises: dividing the weight matrix into a plurality of N×L blocks; converting entries of a target block and corresponding indices of the input vector into a working block and an index matrix; removing zero entries in the working block; shifting non-zero entries row-by-row to one of their left and right sides in the working block; and, respectively shifting corresponding entries in the index matrix.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: January 14, 2020
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Pei-Wen Hsieh, Chen-Chu Hsu, Tsung-Liang Chen
  • Publication number: 20190370635
    Abstract: There is provided a smart engine including a profile collector and a main processing module. The profile collector is configured to store a plurality of profiles, one or more suitable profiles being dynamically selected according to an instruction from a user or an automatic selector. The main processing module is connected to the profile collector and directly or indirectly connected to a sensor, and configured to perform a detailed analysis to determine detailed properties of features, objects, or scenes based on suitable sensor data from the sensor.
    Type: Application
    Filed: May 9, 2019
    Publication date: December 5, 2019
    Inventors: Meng-Hsun WEN, Cheng-Chih TSAI, Jen-Feng LI, Hong-Ching CHEN, Chen-Chu HSU, Tsung-Liang CHEN
  • Publication number: 20190370640
    Abstract: An in-memory computing memory device is disclosed. The memory device comprises an array of memory cells, a plurality of word lines, a plurality of bit lines, (M+1) input circuits, a wordline driver and an evaluation circuitry. The array is divided into (M+1) lanes and each lane comprises P memory cell columns and an input circuit. The input circuit in each lane charges a predefined bit line with a default amount of charge proportional to an input synapse value and then distributes the default amount of charge to the other second bit lines with a predefined ratio based on a constant current. The evaluation circuitry couples a selected number of the bit lines to an accumulate line and convert an average voltage at the accumulate line into a digital value in response to a set of (M+1) input synapse values and the activated word line.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 5, 2019
    Inventors: Chi-Wei PENG, Wei-Hsiang TSENG, Hong-Ching CHEN, Shen-Jui HUANG, Meng-Hsun WEN, Yu-Pao TSAI, Hsuan-Yi HOU, Ching-Hao YU, Tsung-Liang CHEN
  • Patent number: 10312432
    Abstract: A method may include: providing a device stack, the device stack comprising sidewall portions and extending above a substrate base, the device stack further including a plurality of metal layers; depositing an interface layer conformally over the device stack using an atomic layer deposition process, the interface layer comprising a first insulator material; depositing an encapsulation layer on the interface layer, the encapsulation layer comprising a second insulator material; and depositing an interlevel dielectric disposed on the encapsulation layer, the interlevel dielectric comprising a third insulator material.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: June 4, 2019
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Tsung-Liang Chen, Shurong Liang, Alexander C. Kontos
  • Patent number: 10280512
    Abstract: In one embodiment, an apparatus to selectively deposit a carbon layer on substrate, comprising a plasma chamber to receive a flow of carbon-containing gas; a power source to generate a plasma containing the carbon-containing gas in the plasma chamber; an extraction plate to extract an ion beam from the plasma and direct the ion beam to the substrate, the ion beam comprising ions having trajectories forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, the extraction plate further configured to conduct a neutral species derived from the carbon-containing gas to the substrate; and a substrate stage facing the extraction plate and including a heater to heat the substrate to a first temperature, when the ion beam and carbon-containing species impinge on the substrate.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 7, 2019
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alex Tsung-Liang Chen, Simon Ruffell
  • Publication number: 20190115948
    Abstract: A spread spectrum based audio frequency communication system at least includes a transmitting apparatus. The transmitting apparatus includes a first dot-product module, a summation module, a transmitting modulation module, a mixture module, a digital-to-analog converter, and a transmitter. The first dot-product module is configured to perform a dot-product of a first data and a first pseudo-noise code, and derive a first spreading data. The summation module is configured to sum up the first spreading data and a second spreading data to form a summed data. The transmitting modulation module is configured to vary a carrier signal with the summed data to form a modulated signal. The mixture module is configured to mix the modulated signal and an acoustic signal up to form a mixed signal. The digital-to-analog converter is configured to convert the mixed signal into acoustic waves. The transmitter transmits the acoustic waves.
    Type: Application
    Filed: October 1, 2018
    Publication date: April 18, 2019
    Inventors: Yao-Chun LIU, Chun-Hung CHEN, Chen-Chu HSU, Tsung-Liang CHEN
  • Publication number: 20190114543
    Abstract: A local learning system in a local artificial intelligence (AI) device includes at least one data source, a data collector, a training data generator, and a local leaning engine. The data collector is connected to the at least one data source, and used to collect training data. The training data generator is connected to the data collector, and used to analyze the training data to produce paired examples for supervised learning, or unlabeled data for unsupervised learning. The local leaning engine is connected to the training data generator, and includes a local neural network. The local neural network is trained by the paired examples or the unlabeled data in a training phase, and makes inference in an inference phase.
    Type: Application
    Filed: October 1, 2018
    Publication date: April 18, 2019
    Inventors: Chun-Hung CHEN, Chen-Chu HSU, Tsung-Liang CHEN
  • Publication number: 20190115933
    Abstract: An acceleration apparatus applied in an artificial neuron is disclosed. The acceleration apparatus comprises an AND gate array, a first storage device, a second storage device and a multiply-accumulate (MAC) circuit. The AND gate array with plural AND gates receives a first bitmap and a second bitmap to generate an output bitmap. The first storage device stores a first payload and outputs a corresponding non-zero first element according to a first access address associated with a result of comparing the first bitmap with the output bitmap. The second storage device stores a second payload and outputs a corresponding non-zero second element according to a second access address associated with a result of comparing the second bitmap with the output bitmap. The MAC circuit calculates a dot product of two element sequences from the first storage device and the second storage device.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 18, 2019
    Inventors: Chi-Hao Chen, Hong-Ching Chen, Chun-Ming Huang, Tsung-Liang Chen
  • Publication number: 20190012296
    Abstract: A method for matrix by vector multiplication, applied in an artificial neural network system, is disclosed. The method comprises: compressing a plurality of weight values in a weight matrix and indices of an input vector into a compressed main stream; storing M sets of synapse values in M memory devices; and, performing reading and MAC operations according to the M sets of synapse values and the compressed main stream to obtain a number M of output vectors. The step of compressing comprises: dividing the weight matrix into a plurality of N×L blocks; converting entries of a target block and corresponding indices of the input vector into a working block and an index matrix; removing zero entries in the working block; shifting non-zero entries row-by-row to one of their left and right sides in the working block; and, respectively shifting corresponding entries in the index matrix.
    Type: Application
    Filed: June 25, 2018
    Publication date: January 10, 2019
    Inventors: Pei-Wen HSIEH, Chen-Chu HSU, Tsung-Liang CHEN
  • Publication number: 20180314629
    Abstract: A memory device is disclosed. The memory device comprises N flash memories and a flash manager. The flash manager comprises an interleave/de-interleave buffer and an addressing circuit. The interleave/de-interleave buffer operates according to a mode signal. The addressing circuit sequentially converts N input address signals to transmit N converted address signals. For write operations, the interleave/de-interleave buffer interleaves a write parameter stream into N interleaved streams according to the mode signal indicative of interleave mode and the N interleaved streams in conjunction with the N converted address signals are written into the N flash memories in parallel. For read operations, N read streams are read from the N flash memories in parallel in response to the N converted address signals and the interleave/de-interleave buffer de-interleaves the N read streams into a de-interleaved parameter stream according to the mode signal indicative of de-interleave mode.
    Type: Application
    Filed: March 15, 2018
    Publication date: November 1, 2018
    Inventors: Jian-Tai CHEN, Yueh-Nong HONG, Chen-Chu HSU, Tsung-Liang CHEN
  • Patent number: 10113229
    Abstract: Approaches herein increase a ratio of reactive ions to a neutral species in a plasma processing apparatus. Exemplary approaches include providing a processing apparatus having a plasma source chamber including a first gas inlet, and a deposition chamber coupled to the plasma source chamber, wherein the deposition chamber includes a second gas inlet for delivering a point of use (POU) gas to an area proximate a substrate disposed within the deposition chamber. Exemplary approaches further include generating an ion beam for delivery to the substrate, and modifying a pressure within the deposition chamber in the area proximate the substrate to increase an amount of reactive ions present for impacting the substrate when the ion beam is delivered to the substrate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: October 30, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, John Hautala, Shurong Liang, Joseph Olson
  • Publication number: 20180285737
    Abstract: A processing apparatus applied in an artificial neuron is disclosed. The processing apparatus comprises a parser, a lookup array, a summing circuit and a MAC circuit. The parser parses one of M packets to extract a non-zero weight value from a header of the one packet, to identify a plurality of bit positions with a specified digit from a payload of the one packet, and to output the non-zero weight value and the bit positions in parallel. The lookup array contains N synapse values and is indexed by the bit positions in parallel to generate a plurality of match values. The summing circuit sums up the match values to generate a sum value. The MAC circuit generates a product of the non-zero weight value and the sum value, and generates an accumulate value based on the product and at least one previous accumulate value.
    Type: Application
    Filed: March 2, 2018
    Publication date: October 4, 2018
    Inventors: Hong-Ching CHEN, Chun-Ming HUANG, Chi-Hao CHEN, Tsung-Liang CHEN
  • Publication number: 20180265988
    Abstract: A system and method for removing metal from a substrate in a controlled manner is disclosed. The system includes a chamber, with one or more gas inlets to allow the flow of gasses into the chamber, at least one exhaust pump, to exhaust gasses from the chamber, and a heater, capable of modifying the temperature of the chamber. In some embodiments, one or more gasses are introduced into the chamber at a first temperature. The atoms in these gasses chemically react with the metal on the surface of the substrate to form a removable compound. The gasses are then exhausted from the chamber, leaving the removable compound on the surface of the substrate. The temperature of the chamber is then elevated to a second temperature, greater than the sublimation temperature of the removable compound. This increased temperature allows the removable compound to become gaseous and be exhausted from the chamber.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 20, 2018
    Inventors: Tsung-Liang Chen, Benjamin Schmiege, Jeffrey W. Anthis, Glen Gilchrist
  • Patent number: 10000853
    Abstract: A system and method for removing metal from a substrate in a controlled manner is disclosed. The system includes a chamber, with one or more gas inlets to allow the flow of gasses into the chamber, at least one exhaust pump, to exhaust gasses from the chamber, and a heater, capable of modifying the temperature of the chamber. In some embodiments, one or more gasses are introduced into the chamber at a first temperature. The atoms in these gasses chemically react with the metal on the surface of the substrate to form a removable compound. The gasses are then exhausted from the chamber, leaving the removable compound on the surface of the substrate. The temperature of the chamber is then elevated to a second temperature, greater than the sublimation temperature of the removable compound. This increased temperature allows the removable compound to become gaseous and be exhausted from the chamber.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 19, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, Benjamin Schmiege, Jeffrey W. Anthis, Glen Gilchrist