Patents by Inventor Tsung-Yen Lee

Tsung-Yen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230114584
    Abstract: A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 13, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yen Lee, Chin-Hua Wang, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20230063550
    Abstract: A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Chin-Hua WANG, Po-Chen LAI, Shu-Shen YEH, Tsung-Yen LEE, Po-Yao LIN, Shin-Puu JENG
  • Patent number: 11557559
    Abstract: A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: January 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yen Lee, Chin-Hua Wang, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20230010707
    Abstract: Structures and formation methods of a chip package structure are provided. The chip package structure includes a semiconductor die bonded over an interposer substrate. The chip package structure also includes a warpage release layer structure. The warpage release layer structure includes an organic material layer and an overlying high coefficient of thermal expansion (CTE) material layer with a CTE that is substantially equal to or greater than 9 ppm/° C. The organic material layer is in direct contact with the upper surface of the semiconductor die, and the overlying high CTE material layer covers the upper surface of the semiconductor die.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Inventors: Chin-Hua WANG, Kuang-Chun LEE, Shu-Shen YEH, Tsung-Yen LEE, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20220406729
    Abstract: A package structure is provided. The package structure includes a redistribution structure and a first semiconductor die over the redistribution structure. The package structure also includes a wall structure laterally surrounding the first semiconductor die and the wall structure includes a plurality of partitions separated from one another. The package structure also includes an underfill material between the wall structure and the first semiconductor die. The package structure also includes a molding compound encapsulating the wall structure and the underfill material.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Inventors: Po-Chen LAI, Chin-Hua WANG, Ming-Chih YEW, Li-Ling LIAO, Tsung-Yen LEE, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20220278065
    Abstract: A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yen Lee, Chin-Hua Wang, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20220278037
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package at least has a semiconductor die and a redistribution layer disposed on an active surface of the semiconductor die and electrically connected with the semiconductor die. The redistribution layer has a wiring-free zone arranged at a location below a corner of the semiconductor die. An underfill is disposed between the semiconductor die and the redistribution layer. The wiring-free zone is located below the underfill and is in contact with the underfill. The wiring-free zone extends horizontally from the semiconductor die to the underfill.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Kuei Hsu, Ming-Chih Yew, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20220260901
    Abstract: A reticle, a reticle container and a method of lithography process are provided. The reticle container includes: a cover configured to protect a reticle, a baseplate, and a discharging device on the baseplate. The baseplate has: a top surface configured to engage to the cover and a bottom surface opposite to the top surface. The discharging device is configured to neutralize static charges accumulated on the reticle.
    Type: Application
    Filed: April 29, 2022
    Publication date: August 18, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Lun CHANG, Chueh-Chi KUO, Tsung-Yen LEE, Tzung-Chi FU, Li-Jui CHEN, Po-Chung CHENG, Che-Chang HSU
  • Publication number: 20220139860
    Abstract: A method includes forming a package component comprising forming a dielectric layer, patterning the dielectric layer to form an opening, and forming a redistribution line including a via in the opening, a conductive pad, and a bent trace. The via is vertically offset from the conductive pad. The conductive pad and the bent trace are over the dielectric layer. The bent trace connects the conductive pad to the via, and the bent trace includes a plurality of sections with lengthwise directions un-parallel to each other. A conductive bump is formed on the conductive pad.
    Type: Application
    Filed: February 18, 2021
    Publication date: May 5, 2022
    Inventors: Tsung-Yen Lee, Chia-Kuei Hsu, Shang-Lun Tsai, Ming-Chih Yew, Po-Yao Lin
  • Patent number: 11320733
    Abstract: A reticle, a reticle container and a method for discharging static charges accumulated on a reticle are provided. The reticle includes a mask substrate, a reflective multilayer (ML) structure, a capping layer, an absorption structure and a conductive material structure. The mask substrate has a front-side surface and a back-side surface. The reflective ML structure is positioned over the front-side surface of mask substrate. The capping layer is positioned over the reflective ML structure. The absorption structure is positioned over the capping layer. The conductive material structure is positioned over a sidewall surface of the mask substrate and a sidewall surface of the absorption structure.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: May 3, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Lun Chang, Chueh-Chi Kuo, Tsung-Yen Lee, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu
  • Patent number: 11282756
    Abstract: An organic interposer includes polymer matrix layers embedding redistribution interconnect structures, package-side bump structures, die-side bump structures and connected to a distal subset of the redistribution interconnect structures through a respective bump connection via structure. At least one metallic shield structure may laterally surround a respective one of the die-side bump structures. Shield support via structures may laterally surround a respective one of the bump connection via structures. Each metallic shield structure and the shield support via structures may be used to reduce mechanical stress applied to the redistribution interconnect structures during subsequent attachment of a semiconductor die to the die-side bump structures.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tsung-Yen Lee, Chin-Hua Wang, Ming-Chih Yew, Chia-Kuei Hsu, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20220051959
    Abstract: An organic interposer includes polymer matrix layers embedding redistribution interconnect structures, package-side bump structures, die-side bump structures and connected to a distal subset of the redistribution interconnect structures through a respective bump connection via structure. At least one metallic shield structure may laterally surround a respective one of the die-side bump structures. Shield support via structures may laterally surround a respective one of the bump connection via structures. Each metallic shield structure and the shield support via structures may be used to reduce mechanical stress applied to the redistribution interconnect structures during subsequent attachment of a semiconductor die to the die-side bump structures.
    Type: Application
    Filed: August 17, 2020
    Publication date: February 17, 2022
    Inventors: Tsung-Yen LEE, Chin-Hua WANG, Ming-Chih YEW, Chia-Kuei HSU, Po-Chen LAI, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20210389685
    Abstract: A system is disclosed. The system includes a cleaning device and a scanner device. The cleaning device is configured to clean a mask. The scanner device is coupled to the cleaning device and is configured to receive the mask, a reference image and a real-time image that is captured at the mask. The reference image includes at least one first mark image having a plurality of mapping marks on the mask. The real-time image includes at least one second mark image having the plurality of mapping marks on the mask. The scanner device is configured to map the at least one second mark image in the real-time image with the at least one first image in the reference image, when a lithography exposing process is performed. A method is also disclosed herein.
    Type: Application
    Filed: August 27, 2021
    Publication date: December 16, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hao-Yu LAN, Po-Chung CHENG, Ching-Juinn HUANG, Tzung-Chi FU, Tsung-Yen LEE
  • Publication number: 20210335597
    Abstract: A particle removal method for removing particles on the backside of a reticle is provided. The method includes disposing the reticle on a reticle holder. In addition, the method includes moving a baffle defining an enclosed area that encompasses a particle to be removed on a backside of the reticle. The method further includes spraying, by a solution spraying module of a particle removal device, a solution onto the particle. The method further includes sucking, by a sucking module of the particle removal device, the solution on the reticle with the particle. The method further includes emitting, by the particle removal device, a gas onto the backside of the reticle for drying the backside.
    Type: Application
    Filed: July 9, 2021
    Publication date: October 28, 2021
    Inventors: Siao-Chian HUANG, Po-Chung CHENG, Ching-Juinn HUANG, Tzung-Chi FU, Tsung-Yen LEE
  • Patent number: 11121018
    Abstract: A reticle holding tool is provided. The reticle holding tool includes a housing, a reticle chuck, and a gas delivery assembly. The housing includes an opening, a top housing member, and a lateral housing member extending from the top housing member and terminating at a lower edge which is located on a predetermined plane. The reticle chuck is positioned in the housing and has an effective surface configured to secure a reticle. The effective surface is located between the predetermined plane and the top housing member. The reticle chuck is movable between two boundary lines that are perpendicular to the effective surface. A width of the opening is greater than a distance between the two boundary lines. The gas delivery assembly is positioned within the housing and configured to supply gas into the housing.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: September 14, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chueh-Chi Kuo, Tsung-Yen Lee, Chia-Hsin Chou, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu
  • Patent number: 11106146
    Abstract: A system is disclosed. The system includes a cleaning device and a scanner device. The cleaning device is configured to clean a mask. The scanner device is coupled to the cleaning device and is configured to receive the mask, a reference image and a real-time image that is captured at the mask. The reference image includes at least one first mark image having a plurality of mapping marks on the mask. The real-time image includes at least one second mark image having the plurality of mapping marks on the mask. The scanner device is configured to map the at least one second mark image in the real-time image with the at least one first image in the reference image, when a lithography exposing process is performed. A method is also disclosed herein.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: August 31, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hao-Yu Lan, Po-Chung Cheng, Ching-Juinn Huang, Tzung-Chi Fu, Tsung-Yen Lee
  • Patent number: 11062898
    Abstract: A particle removal apparatus is provided. The particle removal apparatus includes a reticle holder configured to hold a reticle. The particle removal apparatus further includes a robotic arm. The particle removal apparatus also includes a particle removal device disposed on the robotic arm, and the particle removal device includes a solution spraying module. In addition, the robotic arm and the particle removal device are configured to align with a particle on a backside of the reticle, and the solution spraying module is configured to spray a solution onto the particle to remove the particle.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: July 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Chian Huang, Po-Chung Cheng, Ching-Juinn Huang, Tzung-Chi Fu, Tsung-Yen Lee
  • Publication number: 20210026236
    Abstract: A reticle, a reticle container and a method for discharging static charges accumulated on a reticle are provided. The reticle includes a mask substrate, a reflective multilayer (ML) structure, a capping layer, an absorption structure and a conductive material structure. The mask substrate has a front-side surface and a back-side surface. The reflective ML structure is positioned over the front-side surface of mask substrate. The capping layer is positioned over the reflective ML structure. The absorption structure is positioned over the capping layer. The conductive material structure is positioned over a sidewall surface of the mask substrate and a sidewall surface of the absorption structure.
    Type: Application
    Filed: October 8, 2020
    Publication date: January 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Lun CHANG, Chueh-Chi KUO, Tsung-Yen LEE, Tzung-Chi FU, Li-Jui CHEN, Po-Chung CHENG, Che-Chang HSU
  • Publication number: 20200350194
    Abstract: A reticle holding tool is provided. The reticle holding tool includes a housing, a reticle chuck, and a gas delivery assembly. The housing includes an opening, a top housing member, and a lateral housing member extending from the top housing member and terminating at a lower edge which is located on a predetermined plane. The reticle chuck is positioned in the housing and has an effective surface configured to secure a reticle. The effective surface is located between the predetermined plane and the top housing member. The reticle chuck is movable between two boundary lines that are perpendicular to the effective surface. A width of the opening is greater than a distance between the two boundary lines. The gas delivery assembly is positioned within the housing and configured to supply gas into the housing.
    Type: Application
    Filed: July 13, 2020
    Publication date: November 5, 2020
    Inventors: Chueh-Chi KUO, Tsung-Yen LEE, Chia-Hsin CHOU, Tzung-Chi FU, Li-Jui CHEN, Po-Chung CHENG, Che-Chang HSU
  • Patent number: 10802394
    Abstract: A reticle, a reticle container and a method for discharging static charges accumulated on a reticle are provided. The reticle includes a mask substrate, a reflective multilayer (ML) structure, a capping layer, an absorption structure and a conductive material structure. The mask substrate has a front-side surface and a back-side surface. The reflective ML structure is positioned over the front-side surface of mask substrate. The capping layer is positioned over the reflective ML structure. The absorption structure is positioned over the capping layer. The conductive material structure is positioned over a sidewall surface of the mask substrate and a sidewall surface of the absorption structure.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: October 13, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiao-Lun Chang, Chueh-Chi Kuo, Tsung-Yen Lee, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu