Patents by Inventor Tsutomu Ishikawa

Tsutomu Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030086464
    Abstract: A gain-coupled DFB laser diode includes a multiple quantum well active layer and a pair of cladding layers sandwiching the multiple quantum well active layer vertically, wherein the multiple quantum well active layer includes a plurality of gain regions aligned in a direction of propagation of a laser beam and repeated periodically, each of the gain regions having a multiple quantum well structure, and a buried layer fills a gap between a pair of adjacent gain regions, wherein the buried layer includes a plurality of high-refractive index layers and a plurality of low-refractive index layers, each of the high-refractive index layers is formed of a first semiconductor material having a first bandgap, while each of the low-refractive index layers is formed of a second semiconductor material having a second, larger bandgap.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 8, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Tsutomu Ishikawa, Hirohiko Kobayashi, Norihiko Sekine, Hajime Shoij
  • Patent number: 6560266
    Abstract: A DFB laser in which a thickness of an active layer changes periodically and a greater part of current injected from external sides is selectively injected into the thick regions (projected regions) of the active layer. Therefore, the ratio of the gain coupling to the refractive index coupling can be further increased, and a threshold current can be lowered, and stability of single mode oscillation can also be improved.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: May 6, 2003
    Assignee: Fujitsu Limited
    Inventors: Hajime Shoji, Hirohiko Kobayashi, Tsutomu Ishikawa
  • Patent number: 6426515
    Abstract: In a semiconductor light-emitting device including an MQW diffraction grating structure mainly used in a gain-coupled DFB laser, the ratio of the gain coupling coefficient to the index coupling coefficient is increased by making each well layer in MQW-A thicker than that in MQW-B. Each well layer and each barrier layer in the MQW structure are made of different compositions of GaInAsP. This implements a semiconductor light-emitting device with high wavelength stability, which does not induce any mode hop even during modulation with high output power or even when external optical feedback is present.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: July 30, 2002
    Assignee: Fujitsu Limited
    Inventors: Tsutomu Ishikawa, Hirohiko Kobayashi, Tsuyoshi Yamamoto, Hajime Shoji
  • Publication number: 20020039375
    Abstract: A DFB laser in which a thickness of an active layer changes periodically and a greater part of current injected from external sides is selectively injected into the thick regions (projected regions) of the active layer. Therefore, the ratio of the gain coupling to the refractive index coupling can be further increased, and a threshold current can be lowered, and stability of single mode oscillation can also be improved.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 4, 2002
    Applicant: Fujitsu Limited
    Inventors: Hajime Shoji, Hirohiko Kobayashi, Tsutomu Ishikawa
  • Publication number: 20020009116
    Abstract: A method of manufacturing a distributed feedback semiconductor laser, has the steps of: growing on a semiconductor substrate a lamination of alternately stacked lower barrier layer and lower well layer having a band gap narrower than the lower barrier layer, to form a lower quantum well structure; growing an intermediate layer on an uppermost lower well layer, the intermediate layer having a band gap broader than the lower well and a thickness thicker than the lower barrier layer; growing on the intermediate layer a lamination of alternately stacked upper well layer and upper barrier layer having a band gap broader than the upper well layer and a thickness thinner than the intermediate layer, to form an upper quantum well structure; forming a mask on the upper quantum well structure, the mask having periodical pattern; by using the mask as an etching mask, etching the upper quantum well structure in a periodical shape by using the intermediate layer as an etching margin layer; and removing the mask.
    Type: Application
    Filed: March 14, 2001
    Publication date: January 24, 2002
    Applicant: Fujitsu Limited
    Inventors: Hirohiko Kobayashi, Tsutomu Ishikawa, Hajime Shoji
  • Publication number: 20010032976
    Abstract: In a semiconductor light-emitting device including an MQW diffraction grating structure mainly used in a gain-coupled DFB laser, the ratio of the gain coupling coefficient to the index coupling coefficient is increased by making each well layer in MQW-A thicker than that in MQW-B. Each well layer and each barrier layer in the MQW structure are made of different compositions of GaInAsP. This implements a semiconductor light-emitting device with high wavelength stability, which does not induce any mode hop even during modulation with high output power or even when external optical feedback is present.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 25, 2001
    Applicant: Fujitsu Limited
    Inventors: Tsutomu Ishikawa, Hirohiko Kobayashi, Tsuyoshi Yamamoto, Hajime Shoji
  • Patent number: 6252252
    Abstract: A mold 25 for molding semiconductor chips 23 and 24 serving as a light emitting element and a light receiving element, respectively, is made of a material capable of transmitting light. A groove 27 is formed on the region where light is emitted from and incident on the semiconductor chips so that it constitutes a reflecting face. Thus, the light is emitted and incident through the side E of the mold. In this configuration, the outer size of the light receiving element or light emitting element can be minimized, and the module provided with these semiconductor chips can also be miniaturized.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: June 26, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hideo Kunii, Toshiyuki Take, Hiroshi Inoguchi, Tsutomu Ishikawa, Masashi Arai, Hiroshi Kobori, Hiroki Seyama, Kiyoshi Takada, Satoru Sekiguchi
  • Patent number: 5850868
    Abstract: A casting method is disclosed in which a resin core is fabricated by using a resin which maintains a mechanical strength satisfying a shape accuracy required for a cast product until solidification of molten metal in contact with the core and is softened when heated beyond the core temperature at which the molten metal in contact with the core was solidified. The removal of the resin core from the cast product after the cast product containing the core from a die, includes a step of forcedly cooling the cast product containing the core down to a predetermined temperature at which the resin core can be removed from the cast product without being broken apart by pulling one of its ends, and a step of withdrawing the core at the predetermined temperature from the cast product having been forcedly cooled down. It is thus possible to cool the core down to a predetermined temperature suited for the withdrawal and preclude the inconvenience that the core being pulled is broken apart.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: December 22, 1998
    Assignees: Toyota Jidosha Kabushiki Kaisha, Aisin Seiki Kabushiki Kaisha, Toshiba Silicon Kabushiki Kaisha
    Inventors: Yuji Okada, Masamichi Okada, Tsutomu Ishikawa, Takumi Yamamoto, Tatsuhiko Sawamura, Norio Hayashi, Takayuki Ito
  • Patent number: 5777955
    Abstract: In a CD type disk player, main data in a digital signal, which is read from a CD type disk traced by a pickup, is decoded in a decoding means in accordance with a bit clock regenerated in a clock regenerator. Both the writing and reading of the data into and from a memory can be synchronized with the bit clock. Also, a selector can switch over the operation clock of the decoding means, thereby selecting the more important factor, either time base precision or decoding ability, in correspondence with the kind of disk. While avoiding the enlargement in size and power consumption of the disk motor, the read out of the information from the disk can be conducted at a higher speed.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: July 7, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Osamu Ikeda, Naobumi Nagasawa, Tsutomu Ishikawa, Akira Tsukihashi
  • Patent number: 5576709
    Abstract: An adder 22, a quantizer 20, and a variable integrator 24 execute A/D conversion and the result is stored in a memory 12. A time constant of the variable integrator at this time is controlled by a time constant controller 25. On the other hand, data from the memory is integrated by a variable integrator 28 to provide an analog signal. At this time, control data of the time constant controller 25 is transferred via a memory 32 to a time constant controller 33, which then uses the transferred control data to control the time constant of the variable integrator 28. When a mode is changed, switches 34 and 35 are turned off. Therefore, a signal with no input can be written into the memory 12 for initializing the memory 12.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: November 19, 1996
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masato Onaya, Tsutomu Ishikawa
  • Patent number: 5400506
    Abstract: Method and apparatus for automatic assembling of a differential gear device, wherein a pair of pinions are introduced by a pinion support device into the chamber of a differential case through respective openings formed through the case, and the pinions are rotatably held between a pair of side gears disposed within the chamber, at respective symmetrical positions which are symmetrical with each other with respect to an axis of rotation of the side gears, so that the pinions are brought into meshing engagement with the side gears by a gear meshing device while one of the side gears is rotated about its axis by a rotating device and while the pinions are held at the respective symmetrical positions.
    Type: Grant
    Filed: November 22, 1993
    Date of Patent: March 28, 1995
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Manabu Ichiki, Masatoshi Kanazawa, Tsutomu Ishikawa
  • Patent number: 5165099
    Abstract: The balance of the volumes in right and left channels in a stereo play back system is controlled. The amount of attenuation of an attenuator provided in each channel is controlled. When the levels of right and left stereo signals are judged to be approximately the same, an oscillator is permitted to oscillate and the pulses from the oscillator are counted by a counter. In accordance with a voltage signal which corresponds to the level ratio of the right and left stereo signals, whether the counter must count upwards or downwards is determined. The balance is controlled in accordance with the amount of attenuation of each attenuator which is determined in accordance with the decoded count value. The completion of the control is detected when the level ratio of the right and left stereo signals alternately change after they become substantially equal, and the control is automatically finished.
    Type: Grant
    Filed: June 26, 1991
    Date of Patent: November 17, 1992
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masato Onaya, Tsutomu Ishikawa, Susumu Yamada
  • Patent number: 5136649
    Abstract: An FM stereophonic receiver for receiving FM stereophonic broadcast signals, which includes a first comparison circuit for generating a first control signal corresponding to ratio of a left stereo signal (L) to a right stereo signal (R), a first separation circuit for separating the first control signal into a left dominant signal and a right dominant signal, a second comparison circuit for generating a second control signal corresponding to ratio of a stereo sum signal (L+R) to a stereo difference signal (L-R), a second separation circuit for separating the second control signal into a sum dominant signal and a difference dominant signal, a first level control circuit for controlling an output signal level of a stereo multiplex circuit through employment of the left and right dominant signals and the sum and difference dominant signals, a level detection device for detecting level of the second control signal, and a second level control circuit for controlling level of the difference dominant signal accordin
    Type: Grant
    Filed: May 22, 1990
    Date of Patent: August 4, 1992
    Inventor: Tsutomu Ishikawa
  • Patent number: 5077797
    Abstract: An FM stereo receiver for receiving FM stereo broadcast signals includes a pro-logic surround system in which the left stereo signal, a right stereo signal, a stereo sum signal and a stereo difference signal are selectively emphasized. Also includes a noise signal detector for detecting the noise signal in the received signal, and a device for disabling the pro-logic surround system when the noise signal is detected.
    Type: Grant
    Filed: May 23, 1990
    Date of Patent: December 31, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tsutomu Ishikawa
  • Patent number: 4987380
    Abstract: A gain controlled amplifier circuit includes a prior stage amplifier circuit (22) for amplifying an input signal, differentially connected first and second transistors (28, 29), and a current source transistor (27) connected to a common emitter of the first and the second transistors. An output current of the prior stage amplifier circuit is provided to the current source transistor, and a control signal is provided between bases of the first and the second transistors. A collector current of the second transistor is provided from an output terminal (31) as an output current, while a collector current of the first transistor is negatively fed back to the prior stage amplifier circuit through a negative feedback path (30).
    Type: Grant
    Filed: August 7, 1989
    Date of Patent: January 22, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tsutomu Ishikawa
  • Patent number: 4983858
    Abstract: A level determining circuit compares an input signal and a reference signal in level, generates a first output signal at a first output terminal (11) when the former is greater than the latter, and generates a second output signal at a second output terminal (12) if the former is smaller than the latter. A switch (15) is disposed in the preceding stage of the first output terminal, which will be opened if the first output signal is not required. A buffer amplifier portion (14) of high input impedance is further provided in the preceding stage of this switch so that the level determining operation can not be influenced by the change in impedance caused by switching of the switch.
    Type: Grant
    Filed: September 7, 1989
    Date of Patent: January 8, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tsutomu Ishikawa
  • Patent number: 4980915
    Abstract: A center mode control circuit includes an amplifying portion (31) for amplifying a center input signal, a switch (34) connected to an input terminal of the amplifying portion, and capacitors (35, 36) selected by the switch and having different characteristic from each other. The modes that are switched are (a) a normal mode for adding a low frequency component of the center input signal to left and right input signals, (b) a phantom mode for adding a full range of the center input signal to the left and the right stereo input signals, and (c) a wide mode for not adding the center input signal to the left and the right stereo input signals.
    Type: Grant
    Filed: August 7, 1989
    Date of Patent: December 25, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tsutomu Ishikawa
  • Patent number: 4953021
    Abstract: A multi-channel sound signal received and detected in a TV receiver includes a main channel signal comprising a stereo sum (L+R) signal, a stereo pilot signal having a frequency of f.sub.H equal to the frequency of a horizontal synchronizing signal, and a sub-channel signal obtained by DSB modulation of a sub-carrier having a frequency of 2f.sub.H by a stereo difference (L-R) signal. In a TV multi-channel sound signal demodulator circuit, the sub-carrier is reproduced by a PLL circuit in response to the stereo pilot signal, to demodulate the stereo difference (L-R) signal using the sub-carrier. The stereo difference signal thus demodulated includes a 60Hz noise component due to interference between a sound signal and a video signal. However, the noise component is removed by a high-pass filter provided between a sub-channel signal demodulator circuit and a matrix circuit. Thus, right and left stereo signals R and L outputted from the matrix circuit do not include a noise component.
    Type: Grant
    Filed: February 1, 1990
    Date of Patent: August 28, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Ishikawa, Akira Kabashima, Hideo Imaizumi
  • Patent number: 4933768
    Abstract: A television receiver includes a volume control circuit (4) for controlling levels of sound signals corresponding to a left channel, a right channel, a center channel and a surround channel and speakers (6 to 10) corresponding to these channels. The television receiver further comprises a test tone circuit (11; 18), a microcomputer (14) and a character display circuit (16). The test tone circuit (11; 18) supplies a test tone of a prescribed frequency sequentially to the speakers (6 to 10) through the volume control circuit (4). The microcomputer (14) provides a command to the character display circuit (16) so that a CRT 17) displays which speaker is currently supplied with the test tone as well as volume levels of the respective speakers.
    Type: Grant
    Filed: July 19, 1989
    Date of Patent: June 12, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Ishikawa, Ryuichi Ogawa, Masaya Tanno, Fumio Tosaka, Hirofumi Okada, Takayuki Imaida
  • Patent number: RE35960
    Abstract: Method and apparatus for automatic assembling of a differential gear device, wherein a pair of pinions are introduced by a pinion support device into the chamber of a differential case through respective openings formed through the case, and the pinions are rotatably held between a pair of side gears disposed within the chamber, at respective symmetrical positions which are symmetrical with each other with respect to an axis of rotation of the side gears, so that the pinions are brought into meshing engagement with the side gears by a gear meshing device while one of the side gears is rotated about its axis by a rotating device and while the pinions are held at the respective symmetrical positions.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: November 17, 1998
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Manabu Ichiki, Masatoshi Kanazawa, Tsutomu Ishikawa