Abstract: A static induction transistor includes a semiconductor substrate with an energy band gap greater than that of silicon, and the semiconductor substrate has a first gate region to which a gate electrode is connected; and a second gate region positioned within a first semiconductor region which becomes a drain region, and the first gate region is in contact with a second semiconductor region which becomes a source region. According to this construction, the OFF characteristics of the static induction transistor are improved.

Abstract: In a static induction transistor, in addition to a first gate layer (4), a plurality of second gate layers (41) having a shallower depth and a narrower gap therebetween than those of the first gate layer (4) are provided in an area surrounded by the first gate layer (4), thereby an SiC static induction transistor with an excellent off characteristic is realized, while ensuring a required processing accuracy during production thereof.

Abstract: To reduce the field intensity on the termination surface, almost not affecting the on-characteristic, a drift layer is made of two layers, an n-layer and n− layer, and a termination region is formed on the surface of the above n− layer. An impurity concentration ratio between the n− layer and the n-layer is less than 1:2, and the thickness of the n− layer is less than that of a source n+ layer. Reliability can be secured even in a high temperature operation.

Abstract: In a static induction transistor, in addition to a first gate layer (4), a plurality of second gate layers (41) having a shallower depth and a narrower gap therebetween than those of the first gate layer (4) are provided in an area surrounded by the first gate layer (4), thereby an SiC static induction transistor with an excellent off characteristic is realized, while ensuring a required processing accuracy during production thereof.

Abstract: The present semiconductor switching device comprises a silicon carbide single crystal of hexagonal symmetry having a first conductive type and a semiconductor region of a second conductive type opposite to the first conductive type and locating in the silicon carbide single crystal. The silicon carbide single crystal of the first conductive type and the semiconductor region of the seconductive type form a pn junction. The pn junction interface has an interface extended in the depth direction from the surface of the silicon carbide single crystal, and the interface includes a crystal plane in parallel to the <1120> orientation of the silicon carbide single crystal or approximately in parallel thereto, thereby reducing the leak current.

Abstract: A wide bandgap semiconductor single crystal is applied as a semiconductor substrate material of a semiconductor surge absorber, and a surge absorption operation starting voltage is set by a punchthrough of a pn junction, to obtain a semiconductor surge absorber with a repetitive operation and a high surge endurance.

Abstract: In a silicon carbide static induction transistor, at a surface part of a semiconductor substrate, a p-type gate region is formed partially overlapping a n-type source region, whereby the high accuracy in alignment between the gate region and the source region is not required, and the gate withstand voltage can be highly increased since the substrate is made of silicon carbide, which improves the yield of static induction transistors.

Abstract: A power converting apparatus comprising a group of semiconductor switches and DC terminals electrically connected to the group of semiconductor switches, in which a clamping circuit is connected to the semiconductor switches or the DC terminals. Otherwise, a diode having a wide band gap is connected in parallel with a snubber diode or a snubber capacitor of a snubber circuit connected in parallel with the semiconductor switches. With such arrangement, an overvoltage or oscillating voltage impressed on the semiconductor switches is suppressed.

Abstract: There is provided a semiconductor substrate which includes a pair of main surfaces, a first semiconductor layer of a first conductivity type adjacent to one of the main surface, a second semiconductor layer of a second conducting type of which impurity concentration is lower than that of the first semiconductor layer and which is adjacent to the first semiconductivity, a third semiconductor layer of the first conductivity type adjacent to the second semiconductor, and a fourth semiconductor of the second conductivity type of which impurity concentration is higher than that of the third semiconductor and which is adjacent to the other of the main surfaces and the third semiconductor.

Abstract: To provide a field-effect transistor having a large power conversion capacity and its fabrication method by decreasing the leakage current between the source and the drain of a semiconductor device made of hexagonal-system silicon carbide when the gate voltage of the semiconductor device is turned off and also decreasing the electrical resistance of the semiconductor device when the gate voltage of the semiconductor device is turned on. The main current path of the field-effect transistor is formed so that the current flowing between the source and the drain of, for example, a field-effect transistor flows in the direction parallel with the {0001} plane and a channel forming plane is parallel with the {1120} plane. ?Selected Drawing!FIG.

Abstract: In a turn off type semiconductor device, an n-type emitter layer is divided into a plurality of elements by trenches. A silicide layer of a high melting point metal is provided on a p-type layer adjacent to the individual elements of the n-type emitter layer on a bottom of each of the trenches. A gate electrode is provided on the associated silicide layer so as to surround the plurality of elements of the n-type emitter layer obtained by the division of the emitter layer. An insulator is filled in each of the trenches dividing the n-type emitter layer surrounded by the gate electrode. A cathode electrode is provided on both the insulators and the n-type emitter layer.

Abstract: A gate turn-off thyristor includes a cathode emitter of n-type, a cathode base of p-type, an anode base of n-type and an anode emitter of p-type. A gate electrode is electrically connected to the p cathode base to enclose and define an elemental gate turn-off thyristor region. A plurality of n cathode emitter regions are arranged in proximity to each other in the elemental gate turn-off thyristor region. A highly-doped buried gate region is provided in the p cathode base with the substantially identical configuration for each n cathode emitter regions.

Abstract: The present invention relates to a buried gate type gate turn-off thyristor. A low-resistance layer which is buried in a cathode base layer has a multiplicity of small bores below a cathode emitter layer. The distance between each pair of adjacent small bores and the thickness of the low-resistance layer are each set so as to be smaller than the carrier diffusion length in an anode base layer. In an on-state, carries flow through the low-resistance layer, thereby allowing the low-resistance layer to become conductive, and thus lowering the on-state voltage. A reduction in the dimension of the small bores lowers the resistance of the low-resistance layer and hence lowers the gate drawing out resistance, so that the interrupting capacity is improved.

Abstract: A semiconductor device includes a semiconductor substrate having at least three semiconductor layers of alternately different conductivity types between a pair of principal surfaces. A pair of main electrodes are kept in low-resistance contact with the outermost ones of the semiconductor layers. A surface-passivation insulating film is provided on an exposed surface of the semiconductor substrate. A resistive material sheet is provided on the insulating film and connected electrically to semiconductor layers having their potentials substantially equal to the main electrodes.

Abstract: In a high-voltage thyristor comprising a semiconductor body having contiguous pnpn four layers, and opposed anode and cathode electrodes and a gate electrode provided for the semiconductor body, one of p-base and n-base regions having an impurity concentration higher than the other has an impurity concentration which is no more than 8.times.10.sup.15 atoms/cm.sup.3 in the vicinity of a junction between the one base region and an adjacent emitter region and which has a gradually decreasing gradient toward the other contiguous base region. The one base region has a sheet resistance of 500 to 1500 ohms/.quadrature.. The realization of a high-voltage, large-diameter and large-current thyristor can be ensured.

Abstract: A gate turn-off thyristor and a transistor are disclosed, each of which comprises: a semiconductor substrate including at least three semiconductor layers between a pair of principal surfaces, adjacent ones of the semiconductor layers being different in conductivity type from each other, a first one of the semiconductor layers being formed of at least one strip-shaped region with a constant width, a second one of the semiconductor layers being exposed to a first principal surface of the semiconductor substrate together with the strip-shaped region; a first main electrode kept in ohmic contact with the strip-shaped region at the first principal surface; a first control electrode kept in ohmic contact with the second semiconductor layer on one side of the strip-shaped region in the direction of the width thereof and connected directly to a control terminal; a second control electrode kept in ohmic contact with the second semiconductor layer on the other side of the strip-shaped region in the direction of the wi

Abstract: A semiconductor device such as a transistor or gate turn-off thyristor provided with a control electrode for improving the current cut-off performance, is disclosed in which an emitter layer of a semiconductor substrate is formed of a plurality of strip-shaped regions, a base layer adjacent to the strip-shaped regions is exposed to one principal surface of the semiconductor substrate together with the strip-shaped regions, one main electrode is provided on each strip-shaped region, first and second control electrodes are provided on the base layer, on one and the other sides of each strip-shaped region viewed in the direction of the width thereof, respectively, the other main electrode is provided on the second principal surface of the semiconductor substrate, and a gate terminal is not connected to the first control electrode but connected to the second control electrode, in order to draw out carriers unequally by the first and second control electrodes at a turn-off period.

Abstract: In accordance with the present invention, a plurality of strip-shaped emitter layers on the cathode side are radially arranged on one main surface of the semiconductor substrate while forming a plurality of rings. A gate electrode is in ohmic contact with a part of a base layer which surrounds and is adjacent to each of said emitter layers on the cathode side. Between rings formed by said emitter layers on the cathode side, a ring-shaped gate collecting electrode is provided to be connected to said gate electrode. The gate collecting electrode is provided at a position to balance the potential differences produced by gate currents respectively corresponding to inside and outside of said gate collecting electrode.

Abstract: A multi-emitter type semiconductor device, namely, a semiconductor device having an arrangement in which a majority of emitter regions are divided by a gate region and surrounded thereby. In the semiconductor device, a member adapted to apply an external control signal to a gate electrode takes the form of a closed-loop shape and the majority of emitter regions are arranged on both sides of the loop. This arrangement ensures that the individual emitter regions, even when the number of the emitter regions is increased to a great extent, can be applied with a uniform control signal, thereby preventing degradation of the turn-off characteristics.

Abstract: A gate turn-off thyristor in which a cathode-emitter layer is divided into a plurality of strip-like regions which are radially arrayed on a major surface of a semiconductor substrate in a coaxial multi-ring pattern including a plurality of coaxially arrayed rings. The cathode-emitter strips belonging to a given one of the rings have some radial length. The cathode-emitter strips belonging to the inner ring of a coaxial multi-ring pattern have a smaller radial length than that of the cathode-emitter strips constituting the outer ring. A cathode electrode is contacted to the cathode-emitter strip in low resistance ohmic contact. A gate electrode is ohmic contacted with a low resistance to a cathode-base layer located adjacent to the cathode-emitter strip so as to enclose it. An anode electrode is ohmic contacted with a low resistance to the anode-emitter layer. With the structure of GTO, turn-off operation of unit GTO's each including a cathode-emitter strip is equalized.