Patents by Inventor Tsuyoshi Fukada
Tsuyoshi Fukada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20010055876Abstract: Plural semiconductor chips such as acceleration sensor chips formed on the first surface of a substrate are separated into individual pieces by dicing the substrate from the second surface thereof. A groove surrounding each sensor chip, along which the sensor chip is diced out, is formed at the same time the sensor chip is formed on the first surface. Before dicing, a protecting sheet covering the first surface is pasted along the sidewalls and the bottom wall of the groove. The groove is made sufficiently wide to ensure that the protecting sheet is bent along the walls of the groove without leaving a space between the groove and the protecting sheet. Thus, dicing dusts generated in the dicing process are prevented from being scattered and entering the sensor chip.Type: ApplicationFiled: May 30, 2001Publication date: December 27, 2001Inventors: Minekazu Sakai, Hiroshige Sugito, Hiroshi Muto, Motoki Ito, Tsuyoshi Fukada
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Patent number: 6308567Abstract: A compact angular velocity sensor, which can improve an S/N (signal/noise) ratio. An angular velocity sensor includes an SOI substrate, four oscillatory masses movably supported to the SOI substrate, and four detection electrodes provided outer side of the oscillatory masses for detecting displacements of the oscillatory masses. The oscillatory masses are arranged point-symmetry with respect to a predetermined point K in a flat plane parallel to the SOI substrate. Each of the four oscillatory masses adjacent each other is oscillated in reverse phase in a circumstantial direction about the predetermined point K along the flat plane. When an angular velocity &OHgr; is generated about the predetermined point K, detection weights of the oscillatory masses are displaced along a direction perpendicular to oscillation direction in the flat plane.Type: GrantFiled: December 10, 1999Date of Patent: October 30, 2001Assignee: Denso CorporationInventors: Hirofumi Higuchi, Nobuyuki Ohya, Tsuyoshi Fukada
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Publication number: 20010029060Abstract: In a method for manufacturing a semiconductor acceleration sensor, a movable portion including a mass portion and movable electrodes is formed in a single crystal silicon thin film provided on a silicon wafer through an insulation film by etching both the single crystal silicon thin film and the silicon wafer. In this case, the movable portion is finally defined at a movable portion defining step that is carried out in a vapor phase atmosphere. Accordingly, the movable portion is prevented from sticking to other regions due to etchant during the manufacture thereof.Type: ApplicationFiled: May 22, 2001Publication date: October 11, 2001Applicant: DENSO CorporationInventors: Tsuyoshi Fukada, Minekazu Sakai, Minoru Murata, Yukihiro Takeuchi, Seiki Aoyama
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Patent number: 6287885Abstract: In a method for manufacturing a semiconductor acceleration sensor, a movable portion including a mass portion and movable electrodes is formed in a single crystal silicon thin film provided on a silicon wafer through an insulation film by etching both the single crystal silicon thin film and the silicon wafer. In this case, the movable portion is finally defined at a movable portion defining step that is carried out in a vapor phase atmosphere. Accordingly, the movable portion is prevented from sticking to other regions due to etchant during the manufacture thereof.Type: GrantFiled: May 6, 1999Date of Patent: September 11, 2001Assignee: Denso CorporationInventors: Hiroshi Muto, Tsuyoshi Fukada, Masakazu Terada, Hiroshige Sugito, Masakazu Kanosue, Shinji Yoshihara, Shoji Ozoe, Seiji Fujino, Minekazu Sakai, Minoru Murata, Yukihiro Takeuchi, Seiki Aoyama, Toshio Yamamoto, Kazushi Asami
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Patent number: 6284670Abstract: After an Si wafer is anisotropically etched through an etching mask having an opening in an anisotropically etching solution, an etching face of the Si wafer emerged by the anisotropic etching is subjected to anodic oxidation by applying a positive voltage for anodic oxidation on the Si wafer. As a result, the etching face of the Si wafer is isotropically etched due to the anodic oxidation in the anisotropic etching solution. By the isotropic etching thus performed, a sharp corner formed at an end portion of a recess portion formed in the Si wafer by the anisotropic etching, is rounded. Because the isotropic etching reaction progresses very slowly in comparison with the anisotropic etching, control of the etching can be made easy and accurately. As a result, the thickness of the diaphragm can be prevented from being dispersed.Type: GrantFiled: July 23, 1998Date of Patent: September 4, 2001Assignee: Denso CorporationInventors: Yoshitsugu Abe, Hiroshi Tanaka, Atsushi Sakaida, Toshihisa Taniguchi, Tsuyoshi Fukada
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Patent number: 6240782Abstract: A semiconductor physical quantity sensor includes a substrate, a beam-structure movable portion and a fixed portion. The beam-structure movable portion is suspended by four anchors formed of polycrystalline films. A rectangular mass is suspended between beams. Movable electrodes project from both sides of the mass. First fixed electrodes and second fixed electrodes are fixedly provided on the surface of the substrate. The substrate has a laminated structure, wherein an oxide film, attaching film, insulating films, conductive film and insulating film are laminated on the substrate. An anchor formed from the conductive film is electrically connected to the attaching film. An electrode pad made of an aluminum film is provided the above the anchor. Because this structure enables the potential of the attaching film to be fixed, parasitic capacitance can be decreased.Type: GrantFiled: February 11, 1999Date of Patent: June 5, 2001Assignee: Denso CorporationInventors: Nobuyuki Kato, Toshimasa Yamamoto, Tsuyoshi Fukada, Minekazu Sakai
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Patent number: 6194236Abstract: An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part.Type: GrantFiled: February 11, 1999Date of Patent: February 27, 2001Assignee: Denso CorporationInventors: Minekazu Sakai, Tsuyoshi Fukada, Yukihiko Tanizawa, Koki Mizuno, Yasutoshi Suzuki, Yoshitsugu Abe, Hiroshi Tanaka, Motoki Ito, Kazuhisa Ikeda, Hiroshi Okada
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Patent number: 6151966Abstract: A semiconductor accelerometer device is formed on an SOI substrate by micro-machining. A movable unit is supported at both ends, and a weight portion is movable in response to acceleration exerted in the detection direction. A movable electrode is formed in a comb shape integrally with the weight portion. A pair of fixed electrodes in a comb shape are cantilevered and interleaved with the movable electrode to face the movable electrode. A plurality of through holes is provided in the electrodes so that the electrodes have Rahmen structure which is a series of rectangular frames. This structure reduces the weight of each electrode while increasing the strength against twist force. The electrodes are less likely from breaking in response to an acceleration exerted in a direction perpendicular to the normal detection direction because of reduced weight.Type: GrantFiled: May 5, 1999Date of Patent: November 28, 2000Assignee: Denso CorporationInventors: Minekazu Sakai, Yukihiro Takeuchi, Kazuhiko Kano, Seiji Fujino, Tsuyoshi Fukada, Hiroshige Sugito, Minoru Murata, Hiroshi Muto, Hirofumi Higuchi, Kenichi Ao
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Patent number: 6143584Abstract: A semiconductor sensor has gauge resistors. The gauge resistors connect with aluminum electrodes through contact holes, and form a bridge circuit. The gauge resistors are formed on each chip area of a semiconductor substrate before dicing the chip areas. Then, the resistances of the gauge resistors or the output of the bridge circuit are measured. Contact positions of the gauge resistors or the size and/or shape of the contact holes are adjusted based on the result of the measurement in order to adjust the offset voltage of the bridge circuit formed on each chip area.Type: GrantFiled: July 24, 1998Date of Patent: November 7, 2000Assignee: Denso CorporationInventors: Tsuyoshi Fukada, Masakazu Kanosue, Kenichi Ao, Minoru Murata, Seiichiro Ishio
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Patent number: 6077721Abstract: A semiconductor sensor mount is formed as follows: through holes are formed that penetrate a glass plate; and then the glass plate having the through holes is dipped into hydrofluoric acid etchant to smooth the inner peripheral surfaces of the respective through holes. By etching the inner peripheral surfaces of the respective through holes after the through hole formation, minute roughness and cracks formed on the inner peripheral surfaces are removed, and thereby the areas for adsorbing gas are substantially reduced. That is, vacuums within the through holes can be maintained at a high degree during the anodic bonding, whereby undesirable electric discharge phenomena are prevented even if a relatively high voltage is applied during the anodic bonding. Accordingly, the yield of products can be improved while improving productivity.Type: GrantFiled: October 8, 1997Date of Patent: June 20, 2000Assignees: Nippondenso Co., Ltd., Iwaki Glass Co., Ltd.Inventors: Tsuyoshi Fukada, Yasutoshi Suzuki, Koushu Satoh, Hiroaki Kawashima
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Patent number: 5949118Abstract: An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part.Type: GrantFiled: April 24, 1996Date of Patent: September 7, 1999Assignee: Nippondenso Co., Ltd.Inventors: Minekazu Sakai, Tsuyoshi Fukada, Koki Mizuno, Yasutoshi Suzuki, Yoshitsugu Abe, Hiroshi Tanaka, Motoki Ito, Kazuhisa Ikeda, Hiroshi Okada
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Patent number: 5920106Abstract: A semiconductor pressure detection device includes a diaphragm formed at a portion of a P- conductivity type semiconductor substrate having a reduced thickness. Gauge resistors are formed on the surface of an N- conductivity type semiconductor layer formed on the substrate. An N+ conductivity type diffusion layer is formed in the N- conductivity type semiconductor layer to fix the electric potential of the N- conductivity type layer. The first conductivity type area surrounds the diaphragm. Therefore, when the N- conductivity type area is supplied with electric potential, the potential gradient in the N- conductivity type layer is small. Thus, the leakage current which flows to a pn junction between the gauge resistors and the N- conductivity type area is reduced.Type: GrantFiled: December 9, 1997Date of Patent: July 6, 1999Assignee: Denso CorporationInventors: Nobukazu Oba, Toshio Ikuta, Minekazu Sakai, Tsuyoshi Fukada, Yasutoshi Suzuki
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Patent number: 5736061Abstract: A semiconductor sensor mount is formed as follows: through holes are formed that penetrate a glass plate; and then the glass plate having the through holes is dipped into hydrofluoric acid etchant to smooth the inner peripheral surfaces of the respective through holes. By etching the inner peripheral surfaces of the respective through holes after the through hole formation, minute roughness and cracks formed on the inner peripheral surfaces are removed, and thereby the areas for adsorbing gas are substantially reduced. That is, vacuums within the through holes can be maintained at a high degree during the anodic bonding, whereby undesirable electric discharge phenomena are prevented even if a relatively high voltage is applied during the anodic bonding. Accordingly, the yield of products can be improved while improving productivity.Type: GrantFiled: June 27, 1996Date of Patent: April 7, 1998Assignees: Nippondenso Co. Ltd., Iwaki Glass Co., Ltd.Inventors: Tsuyoshi Fukada, Yasutoshi Suzuki, Koushu Satoh, Hiroaki Kawashima
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Patent number: 5677248Abstract: The electrochemical stop etching is favorably carried out by the application of any voltage without permitting current that is caused by aluminum remainder to leak and avoiding short-circuits between the low-resistance layer in the scribe region and the isolation. In a method of producing semiconductor devices relying upon the electrochemical stop etching, major circuits are constituted and ground aluminum wirings 5 are formed on at least one surface of a substrate 7, and their peripheries are surrounded by scribe regions to form a plurality of chip patterns 1. On the same surface of the substrate 7 where chip patterns 1 are formed, aluminum wirings 3 for etching are formed via a field oxide film 10 while maintaining a predetermined gap relative to the GND aluminum wirings and maintaining an equal height and surrounding the chip patterns 1 in the scribe regions.Type: GrantFiled: March 29, 1995Date of Patent: October 14, 1997Assignee: Nippondenso Co., Ltd.Inventors: Minekazu Sakai, Tsuyoshi Fukada, Nobukazu Ohba
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Patent number: 5654244Abstract: In the present invention, a first protective layer formed over a diaphragm is prevented from being etched unnecessarily at the time of etching a second protective layer, and the detection accuracy of the diaphragm is improved.In a process for producing a semiconductor pressure sensor, a first protective layer 4, a metal layer 8 and a second protective layer 6 are successively formed by deposition over a diaphragm 1a, and the second protective layer 6 is removed by etching so that the second protective layer 6 is left on a predetermined portion of an electrode 5. Since the metal layer 8 acts as an etching stopper layer at the time of removing the second protective layer 6 by etching, the first protective layer 4 over the diaphragm 1a is prevented from being etched. The metal layer 8 is removed by etching thereafter so that only the first protective layer 4 is formed over the diaphragm 1a.Type: GrantFiled: April 26, 1995Date of Patent: August 5, 1997Assignee: Nippondenso Co., Ltd.Inventors: Minekazu Sakai, Tsuyoshi Fukada, Hiroshige Sugito
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Patent number: 5643803Abstract: It is intended to provide an etching method for semiconductor devices in which the etching depth or the thickness of a thin thickness portion can be precisely controlled. According to experiment results, when a P-type substrate in which an N-type epitaxial layer is formed is immersed in an etching solution such as KOH or the like, and a voltage for reverse bias of PN junction is applied between an electrode plate opposing the substrate and the epitaxial layer to perform electrochemical etching, it has been found that the distance from the PN junction plane to the etching stop position is approximately equal to a depletion layer width at the substrate side of the PN junction portion. Namely, the etching stops at the forward end of the depletion layer.Type: GrantFiled: September 17, 1993Date of Patent: July 1, 1997Assignee: Nippondenso Co., Ltd.Inventors: Tsuyoshi Fukada, Yoshimi Yoshino, Hiroshige Sugito, Minekazu Sakai
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Patent number: 5622901Abstract: In a semiconductor strain sensor, for example, using resistors of a polycrystalline semiconductor material such as polycrystalline silicon as strain gauges, the sum of the temperature coefficient of resistance (TCR) of the resistor and the temperature coefficient of strain sensitivity (TCK) is adjusted not by controlling the impurity carrier concentration but by controlling the resistivity, thereby an output fluctuation due to a change in the temperature can be suppressed.Type: GrantFiled: August 2, 1994Date of Patent: April 22, 1997Assignee: Nippondenso Co., Ltd.Inventor: Tsuyoshi Fukada
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Patent number: 5575887Abstract: A plasma etching method, which can form concave parts and/or opening parts on a substrate by performing etching at a high speed and does not damage an element part formed on the surface of the substrate, is disclosed. On a semiconductor substrate with one surface as an element part forming surface and the other surface having an insulating film thereon as an etching surface are formed concave parts and/or opening parts by means of etching by applying a high-frequency electric power to a reactive gas and generating plasma thereby. The substrate is disposed on an electrode having grounded electric potential with the insulating film positioned on the lower side and a conductive part material having grounded electric potential is disposed around the substrate.Type: GrantFiled: March 24, 1995Date of Patent: November 19, 1996Assignees: Nippondenso Co., Ltd., Nippon Soken, Inc.Inventors: Takahiko Yoshida, Kazushi Asami, Muneo Yorinaga, Tsuyoshi Fukada
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Patent number: 5549785Abstract: A method of producing a semiconductor dynamic sensor which features an improved sensitivity yet having a small size while avoiding damage to the thin distortion-producing portion. A resist film 49 is photo-patterned on the front main surface of the semiconductor substrate 41 except for the region where the upper isolation grooves are to be formed prior to forming the lower isolation groove 10 by the first etching of the back main surface of the semiconductor substrate 41 (which includes the epitaxial layer 42). Unlike the prior art, therefore, there is no need to spin-coat the front main surface of the semiconductor substrate 41 with the resist film 49 which is followed by photo-patterning after a predetermined region of the semiconductor substrate 41 has been reduced in thickness by the first etching. Therefore, damage therefore to the thin portion by the vacuum chucking the wafer during the spin-coating of the resist film is avoided.Type: GrantFiled: September 14, 1993Date of Patent: August 27, 1996Assignee: Nippondenso Co., Ltd.Inventors: Minekazu Sakai, Tsuyoshi Fukada, Masakazu Terada, Shinsuke Watanabe, Minoru Nishida
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Patent number: 5525549Abstract: A method for producing a semiconductor device that is capable of solving problems related to dicing a metal thin film used for electrochemical etching. According to the method, an n type epitaxial thin layer is formed on a p type single-crystal silicon wafer. An n.sup.+ type diffusion layer is formed in a scribe line area on the epitaxial layer. An n.sup.+ type diffusion layer is formed in an area of the epitaxial layer which corresponds to a predetermined portion of the wafer. An aluminum film is formed over the diffusion layers. The aluminum film has a clearance for passing a dicing blade. Portions of the wafer are electrochemically etched by supplying electricity through the aluminum film and the diffusion layers, to leave portions of the epitaxial layer. The wafer is diced into chips along the scribe line area. Each of the chips forms a separate semiconductor device.Type: GrantFiled: April 21, 1993Date of Patent: June 11, 1996Assignee: Nippondenso Co., Ltd.Inventors: Tsuyoshi Fukada, Yoshimi Yoshino, Yukihiko Tanizawa