Patents by Inventor Tz-Cheng Chiu
Tz-Cheng Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8431437Abstract: A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.Type: GrantFiled: April 7, 2011Date of Patent: April 30, 2013Assignees: Chipmos Technologies Inc, Chipmos Technologies (Bermuda) LtdInventors: Yu-Ren Chen, Geng-Shin Shen, Tz-Cheng Chiu
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Patent number: 8426245Abstract: A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.Type: GrantFiled: April 7, 2011Date of Patent: April 23, 2013Assignees: ChipMos Technologies Inc, ChipMos Technologies (Bermuda) LtdInventors: Yu-Ren Chen, Geng-Shin Shen, Tz-Cheng Chiu
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Publication number: 20110183466Abstract: A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.Type: ApplicationFiled: April 7, 2011Publication date: July 28, 2011Inventors: Yu-Ren CHEN, Geng-Shin Shen, Tz-Cheng Chiu
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Publication number: 20110183467Abstract: A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.Type: ApplicationFiled: April 7, 2011Publication date: July 28, 2011Inventors: Yu-Ren CHEN, Geng-Shin Shen, Tz-Cheng Chiu
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Patent number: 7679190Abstract: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.Type: GrantFiled: October 4, 2007Date of Patent: March 16, 2010Assignee: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Manjula N Variyam
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Patent number: 7572677Abstract: In a semiconductor flip-chip package having a semiconductor die as part of a substrate assembly, a lid (or lid assembly) and substrate are supported to prevent tilting and teetering of the lid. The lid and substrate do not adhere, so as to reduce cracking of solder joints due to thermal cycling induced by repeated system power on-off. An adhesion prohibitor may be applied so that a support does not adhere to both lid and substrate; the support may be prevented from adhering to both lid and substrate by a separate curing step. The arrangements and fabrication methods may be applied to many package types, including ball grid array (BGA) and land grid array (LGA) packages.Type: GrantFiled: September 6, 2006Date of Patent: August 11, 2009Assignee: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Rajiv Carl Dunne
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Publication number: 20090047754Abstract: A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material.Type: ApplicationFiled: July 16, 2008Publication date: February 19, 2009Applicant: CHIPMOS TECHNOLOGIES (BERMUDA) LTD.Inventors: Yu-Ren Chen, Geng-Shin Shen, Tz-Cheng Chiu
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Publication number: 20080218986Abstract: Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the die during heating of the solder to a liquescent state, thereby increasing the stand-off height of the die above the substrate. The lifting force is maintained during cooling of the solder to a solid state, thereby forming increased stand-off height solder connections.Type: ApplicationFiled: May 22, 2008Publication date: September 11, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Charles Anthony Odegard, Tz-Cheng Chiu
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Patent number: 7393719Abstract: Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the die during heating of the solder to a liquescent state, thereby increasing the stand-off height of the die above the substrate. The lifting force is maintained during cooling of the solder to a solid state, thereby forming increased stand-off height solder connections.Type: GrantFiled: April 19, 2005Date of Patent: July 1, 2008Assignee: Texas Instruments IncorporatedInventors: Charles Anthony Odegard, Tz-Cheng Chiu
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Publication number: 20080023834Abstract: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.Type: ApplicationFiled: October 4, 2007Publication date: January 31, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Tz-Cheng Chiu, Manjula Variyam
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Patent number: 7323362Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.Type: GrantFiled: September 30, 2005Date of Patent: January 29, 2008Assignee: Texas Instruments IncorporatedInventors: Charles A. Odegard, Vinu Yamunan, Tz-Cheng Chiu
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Patent number: 7294451Abstract: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.Type: GrantFiled: November 18, 2003Date of Patent: November 13, 2007Assignee: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Manjula N. Variyam
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Patent number: 7267861Abstract: A metal interconnect structure (100) comprising a bond pad (101), which has copper with at least 70 volume percent composed of crystal grains expanding more than 1 ?m in their main direction, and 30 or less volume percent composed of crystal grains, which expand less than 1 ?m in their main crystal direction. A body (102) of tin alloy is in contact with the bond pad.Type: GrantFiled: May 31, 2005Date of Patent: September 11, 2007Assignee: Texas Instruments IncorporatedInventors: Darvin R. Edwards, Tz-Cheng Chiu, Kejun Zeng
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Publication number: 20070004083Abstract: In a semiconductor flip-chip package having a semiconductor die as part of a substrate assembly, a lid (or lid assembly) and substrate are supported to prevent tilting and teetering of the lid. The lid and substrate do not adhere, so as to reduce cracking of solder joints due to thermal cycling induced by repeated system power on-off. An adhesion prohibitor may be applied so that a support does not adhere to both lid and substrate; the support may be prevented from adhering to both lid and substrate by a separate curing step. The arrangements and fabrication methods may be applied to many package types, including ball grid array (BGA) and land grid array (LGA) packages.Type: ApplicationFiled: September 6, 2006Publication date: January 4, 2007Applicant: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Rajiv Dunne
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Publication number: 20060267157Abstract: A metal interconnect structure (100) comprising a bond pad (101), which has copper with at least 70 volume percent composed of crystal grains expanding more than 1 ?m in their main direction, and 30 or less volume percent composed of crystal grains, which expand less than 1 ?m in their main crystal direction. A body (102) of tin alloy is in contact with the bond pad.Type: ApplicationFiled: May 31, 2005Publication date: November 30, 2006Inventors: Darvin Edwards, Tz-Cheng Chiu, Kejun Zeng
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Publication number: 20060270106Abstract: System and method for a polymer encapsulated solder lid attach. A preferred embodiment comprises one or more metallic islands distributed throughout the combination attach, wherein each metallic island overlays one or more heat producing portions of the integrated circuit die, and a polymer encapsulant to encircle each metallic island and to bind the one or more metallic islands in place. The one or more metallic islands, with their high thermal conductivity, can effectively dissipate large amounts of heat, while the polymer encapsulant binds the one or more metallic islands in place, preventing (or reducing) movement occurring during thermal cycles that can lead to delamination and separation.Type: ApplicationFiled: May 31, 2005Publication date: November 30, 2006Inventors: Tz-Cheng Chiu, Charles Odegard
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Patent number: 7126217Abstract: In a semiconductor flip-chip package having a semiconductor die 104 as part of a substrate assembly, a lid 110 (or lid assembly) and substrate 102 are supported to prevent tilting and teetering of the lid. The lid and substrate do not adhere, so as to reduce cracking of solder joints due to thermal cycling induced by repeated system power on-off. An adhesion prohibitor 315, 325 may be applied so that a support 314, 324 does not adhere to both lid and substrate; the support 314, 324 may be prevented from adhering to both lid and substrate by a separate curing step. The arrangements and fabrication methods may be applied to many package types, including ball grid array (BGA) and land grid array (LGA) packages.Type: GrantFiled: August 7, 2004Date of Patent: October 24, 2006Assignee: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Rajiv Carl Dunne
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Publication number: 20060234490Abstract: Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the die during heating of the solder to a liquescent state, thereby increasing the stand-off height of the die above the substrate. The lifting force is maintained during cooling of the solder to a solid state, thereby forming increased stand-off height solder connections.Type: ApplicationFiled: April 19, 2005Publication date: October 19, 2006Inventors: Charles Odegard, Tz-Cheng Chiu
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Publication number: 20060043586Abstract: A system comprising a ball grid array (“BGA”) substrate adapted to electrically couple to an application board using a plurality of solder balls, and a film adapted to abut the application board and the BGA substrate, the film comprising a plurality of perforations, the solder balls adapted to couple to the application board through the perforations.Type: ApplicationFiled: August 24, 2004Publication date: March 2, 2006Applicant: Texas Instruments IncorporatedInventors: Tz-Cheng Chiu, Shih-Fang Chuang
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Publication number: 20060027907Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.Type: ApplicationFiled: September 30, 2005Publication date: February 9, 2006Inventors: Charles Odegard, Vinu Yamunan, Tz-Cheng Chiu