Abstract: In one aspect, a shared transport layer frame information structure (FIS) generation logic may generate FISes for each of a plurality of SATA ports. In a further aspect, a port addressing logic, in communication with the shared transport layer FIS generation logic, may select one of the SATA ports for each of the FISes.

Abstract: A device includes a task context controller, at least one transport engine connected to the task context controller, and at least one comparator connected to the transport engine. The comparator to compare a data offset from a receive frame with a current data offset and a result is used to determine frame processing order.

Abstract: Disclosed is a target port that implements a transport layer retry (TLR) mechanism. The target port includes a circuit having a transmit transport layer and receive transport layer in which both the transmit and receive transport layers are coupled to a link. A transmit protocol processor of the transmit transport layer controls a TLR mechanism in a serialized protocol. A receive protocol processor of the receive transport layer is coupled to the transmit transport layer and likewise controls the TLR mechanism in the serialized protocol.

Abstract: Apparatus and systems, as well as methods and articles, may operate to relate a port multiplier (PM) tag associated with a frame information structure frame to a remote node context index and to a validity flag using a hardware PM look-up table in a host bus adapter.

Abstract: Methods and apparatus for host-side Serial ATA Native Command Queuing (NCQ) tag management are disclosed. In one aspect, an exemplary apparatus may include a memory and an NCQ tag selection circuit in communication with the memory. The memory may store information for each of a plurality of different NCQ tag values. The information for each NCQ tag value may indicate whether or not a command having the NCQ tag value has been issued. The NCQ tag selection circuit may examine the information in the memory, and may select an NCQ tag value having information that indicates that a command having the NCQ tag value has not been issued. Systems and architectures including such apparatus are also disclosed.

Abstract: An embodiment is a method and apparatus to prevent the propagation of an error in a transmission from an I/O processor of a peripheral device to a host in a computer system utilizing a PCI, PCI-X, or PCI Express link.