Patents by Inventor Vijay Sundaresan

Vijay Sundaresan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10592387
    Abstract: An approach is provided in which an information handling system selects a first point in a software program corresponding to a compile-time assumption made by a compiler. The information handling system then selects a set of second points in the software program corresponding to a set of locations at which the compile-time assumption can be violated at runtime. Next, the information handling system starts at the first point and propagates backwards in the software program to identify one or more of the second points that are reached from the backwards propagation. The information handling system then inserts conditional transitions in the software program at each of the identified assumption violation points and executes a compiled version of the software program, resulting in an evaluation of the compile-time assumption at the conditional transitions.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: March 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Andrew Craik, Joseph Devin Micheal Papineau, Vijay Sundaresan
  • Patent number: 10585651
    Abstract: A method and system for partial connection of iterations during loop unrolling during compilation of a program by a compiler. Unrolled loop iterations of a loop in the program are selectively connected during loop unrolling during the compilation, including redirecting, to the head of the loop, undesirable edges of a control flow from one iteration to a next iteration of the loop. Merges on a path of hot code are removed to increase a scope for optimization of the program. The head of the loop and a start of a replicated loop body of the loop are equivalent points of the control flow.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Andrew J. Craik, Vijay Sundaresan
  • Patent number: 10579399
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Publication number: 20200012503
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Publication number: 20190340102
    Abstract: An approach is provided in which an information handling system selects an assumption point in a software program corresponding to a compile-time assumption made by a compiler, and selects an assumption violation point in the software program corresponding to a location at which the compile-time assumption can be violated at runtime. The information handling system propagates backwards in the software program from the assumption point and reaches the assumption violation point. The information handling system determines that the assumption point corresponds to a first method and the assumption violation point corresponds to a second method that is different from the first method, and inserts a conditional transition in the software program at the assumption violation point. The information handling system executes a compiled version of the software program that includes the conditional transition.
    Type: Application
    Filed: July 16, 2019
    Publication date: November 7, 2019
    Inventors: Andrew Craik, Joseph Devin Micheal Papineau, Vijay Sundaresan
  • Patent number: 10379885
    Abstract: A method and system for enhanced local communing optimization of compilation of a program. Within a first pass of a two pass approach, a determination is made as to where in the program to evaluate volatile expressions that can be commoned. In a second pass of the two pass approach, all remaining expressions that are not volatile expressions are commoned.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: August 13, 2019
    Assignee: International Business Machines Corporation
    Inventors: Andrew J. Craik, Patrick R. Doyle, Vijay Sundaresan
  • Patent number: 10353704
    Abstract: A classloader object cache is instantiated from programmed code of a classloader cache class definition. The classloader object cache is referenced by a strong internal reference that is assigned programmatically within a classloader object at instantiation of the classloader object cache and prevents garbage collection of the classloader object cache while the classloader object is loaded and executing. A public interface to the instantiated classloader object cache is provided using programmed code public interface store and retrieve methods of the instantiated classloader object cache that operate when used externally as weak external references to the classloader object cache. Any uses of the public interface store and retrieve methods within external code allow the garbage collection of the instantiated classloader object cache in response to the classloader object with the strong internal reference to the instantiated classloader object cache being unloaded.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: July 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vijay Sundaresan, Andres H. Voldman
  • Publication number: 20190205240
    Abstract: An approach is provided in which an information handling system selects a first point in a software program corresponding to a compile-time assumption made by a compiler. The information handling system then selects a set of second points in the software program corresponding to a set of locations at which the compile-time assumption can be violated at runtime. Next, the information handling system starts at the first point and propagates backwards in the software program to identify one or more of the second points that are reached from the backwards propagation. The information handling system then inserts conditional transitions in the software program at each of the identified assumption violation points and executes a compiled version of the software program, resulting in an evaluation of the compile-time assumption at the conditional transitions.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 4, 2019
    Inventors: Andrew Craik, Joseph Devin Micheal Papineau, Vijay Sundaresan
  • Publication number: 20190129846
    Abstract: Determining whether to perform atomic or conventional reference counting is provided. A single bit of a reference count corresponding to a reference-counted resource is read to determine whether to atomic reference counting is to be performed. It is determined whether the single bit of the reference count is set. In response to determining that the single bit is set, an atomic operation for atomic maintenance of the reference count corresponding to the reference-counted resource is performed by adjusting the reference count by a value of two. In response to determining that the single bit is not set, a conventional adjustment operation is performed for maintenance of the reference count corresponding to the reference-counted resource.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Andrew Craik, Younes Manton, Vijay Sundaresan, Yi Zhang
  • Publication number: 20180321866
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Application
    Filed: July 17, 2018
    Publication date: November 8, 2018
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Patent number: 10120666
    Abstract: In an approach for decreasing an execution time of a computer code, one or more processors identify a long-form conditional branch that is included in a first region of a computer code. The one or more processors generate a long-form unconditional branch with a target that is a target of a long-form conditional branch. The one or more processors modify the long-form conditional branch to be a short-form conditional branch. The one or more processors insert the long-form unconditional branch into the computer code within a branch distance of the short-form conditional branch. The one or more processors modify a target of the short-form conditional branch to be a location of the long-form unconditional branch in the computer code.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Patrick R. Doyle, Vijay Sundaresan
  • Publication number: 20180314451
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 1, 2018
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Patent number: 10114573
    Abstract: A data-serialization system initially uses a recursive serialization algorithm to serialize a hierarchy of nested data objects by translating those objects into a serial stream of data. The system determines that a stack-overflow error is likely to occur whenever the number of objects serialized by the system exceeds a threshold value, or whenever the stack has reached an unacceptable level of utilization. When the system determines that a stack-overflow error is likely or if the system detects that a stack-overflow error will definitely occur if another object is serialized, the system either transfers control to a nonrecursive algorithm that does not require a stack data structure or reduces stack utilization by transferring contents of the stack to a variable-size queue-like data structure.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: October 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Timothy P. Ellison, Amit S. Mane, Sathiskumar Palaniappan, Vijay Sundaresan
  • Publication number: 20180300113
    Abstract: A method and system for partial connection of iterations during loop unrolling during compilation of a program by a compiler. Unrolled loop iterations of a loop in the program are selectively connected during loop unrolling during the compilation, including redirecting, to the head of the loop, undesirable edges of a control flow from one iteration to a next iteration of the loop. Merges on a path of hot code are removed to increase a scope for optimization of the program. The head of the loop and a start of a replicated loop body of the loop are equivalent points of the control flow.
    Type: Application
    Filed: June 21, 2018
    Publication date: October 18, 2018
    Inventors: Andrew J. Craik, Vijay Sundaresan
  • Patent number: 10078505
    Abstract: A method and system for partial connection of iterations during loop unrolling during compilation of a program by a compiler. Unrolled loop iterations of a loop in the program are selectively connected, including redirecting, to the head of the loop, undesirable edges of a control flow from one iteration to a next iteration of the loop. Merges on a path of hot code are removed to increase a scope for optimization of the program. The head of the loop and a start of a replicated loop body of the loop are equivalent points of the control flow. A sequence of blocks on the path of hot code, unpolluted by a control flow of a path of cold code, is extended during the compilation. Information computed by an optimizer about the hot code in a first iteration is used to further optimize a second iteration, and the loop is further unrolled.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: September 18, 2018
    Assignee: International Business Machines Corporation
    Inventors: Andrew J. Craik, Vijay Sundaresan
  • Publication number: 20180232228
    Abstract: A classloader object cache is instantiated from programmed code of a classloader cache class definition. The classloader object cache is referenced by a strong internal reference that is assigned programmatically within a classloader object at instantiation of the classloader object cache and prevents garbage collection of the classloader object cache while the classloader object is loaded and executing. A public interface to the instantiated classloader object cache is provided using programmed code public interface store and retrieve methods of the instantiated classloader object cache that operate when used externally as weak external references to the classloader object cache. Any uses of the public interface store and retrieve methods within external code allow the garbage collection of the instantiated classloader object cache in response to the classloader object with the strong internal reference to the instantiated classloader object cache being unloaded.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Vijay Sundaresan, Andres H. Voldman
  • Patent number: 10001979
    Abstract: Embodiments of the present invention provide methods, computer program products, and systems for optimizing virtual calls. Embodiments of the present invention can be used to receive a virtual call associated with a first implementation method and identify a virtual call associated with a second implementation method that appears to have similar functionality to the first implementation method. Embodiments of the present invention can determine whether the virtual call associated with the first implementation method and the virtual call associated with the second implementation method produce the same result and, responsive to determining that the virtual call associated with the first implementation method and the virtual call associated with the second implementation method produce the same result, use a result of the virtual call associated with the first implementation method as a result of the virtual call associated with the second implementation method.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Patrick R. Doyle, Daniel J. Heidinga, Vijay Sundaresan
  • Patent number: 10002010
    Abstract: Multi-byte compressed string representation embodiments define a String class control field identifying compression as enabled/disabled, and another control field, identifying a decompressed string created when compression enabled. Tests are noped based on null setting of the compression flag. When arguments to a String class constructor are not compressible, a decompressed String is created and stringCompressionFlag initialized. Endian-aware helper methods for reading/writing byte and character values are defined. Enhanced String class constructors, when characters are not compressible, create a decompressed String, and initialize stringCompressionFlag triggering class load assumptions, overwriting all nopable patch points. A String object sign bit is set to one for decompressed strings when compression enabled, and masking/testing this flag bit is noped. Alternative package protected string constructors and operations are provided.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: June 19, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew J. Craik, Filip Jeremic, Vijay Sundaresan
  • Patent number: 9971598
    Abstract: A classloader cache class definition is obtained by a processor. The classloader cache class definition includes code that creates a classloader object cache that is referenced by a strong internal reference by a classloader object in response to instantiation of the classloader cache class definition. A classloader object cache is instantiated using the obtained classloader cache class definition. The strong internal reference is created at instantiation of the classloader object cache. A public interface to the classloader object cache is provided. The public interface to the classloader object cache operates as a weak reference to the classloader object cache and provides external access to the classloader object cache.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: May 15, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vijay Sundaresan, Andres H. Voldman
  • Patent number: 9965254
    Abstract: A computer-implemented method for class load optimizing. The method determines whether a caller method within the class has a specific signature call using the context of the class. The method determines a callee method within the class using the context of the class. Furthermore, the method retrieves a class object of the class and converts the callee method to a second method, in response to the caller method having the specific signature, the callee method being of the specific signature and callee method being the first argument of the caller method.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: May 8, 2018
    Assignee: International Business Machines Corporation
    Inventors: Patrick R. Doyle, Prashanth S. Krishna, Sathiskumar Palaniappan, Vijay Sundaresan