Patents by Inventor Vijay Sundaresan
Vijay Sundaresan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120117549Abstract: A compiler and method of optimizing code by partial inlining of a subset of blocks of called blocks of code into calling blocks of code. A restart of the called blocks of code is provided for the case where non-inlined blocks of code are reached at run time. Blocks selected for partial inlining may include global side effects depending on the computer program environment. Global side effects in the selected blocks of code leading to a restart are sanitized in order to defer changes to the global state of the computer program.Type: ApplicationFiled: February 8, 2011Publication date: May 10, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick R. Doyle, James I.A. Gartley, Derek B. Inglis, Vijay Sundaresan
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Publication number: 20120042325Abstract: Systems and methods of passing arguments between client and server contexts may provide for detecting an in-process call between a client and a server, wherein the client and the server share a common virtual machine instance. An object copy from a source object of the in-process call to a destination object can be conducted based on an internal class structure of the virtual machine instance. The object copy procedure may be repeated for a plurality of source objects of the in-process call.Type: ApplicationFiled: August 11, 2010Publication date: February 16, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Derek B. Inglis, Aruna A. Kalagananam, Vijay Sundaresan
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Publication number: 20120042306Abstract: A compiling system and method for optimizing binary code. The method includes the step of replacing a memory access on a stack area in order to save a value of a register with local variable access. The method further includes: giving a call number to a call instruction and an inlined code in response to an inline expansion of a code to be called by the call instruction; creating a parent-child relationship information for at least one of the call number; processing the memory accesses with an escaped stack pointer as a base address if a stack pointer has escaped; prohibiting a replacement of a prohibited memory access if the stack pointer has escaped; and replacing unprohibited memory access with the local variable access if the stack pointer has escaped.Type: ApplicationFiled: August 10, 2011Publication date: February 16, 2012Applicant: International Business Machines CorporationInventors: Motohiro Kawahito, Ali I. Sheikh, Vijay Sundaresan
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Patent number: 8104028Abstract: Repetitive synchronization in program code is optimized through lock coarsening that is performed subject to a number of constraints. Using a forward pass over the program code followed by a backward pass, region extent bits may be determined that identify the points in the program where object locking can be coarsened. The program code may then be modified to realize coarsened locking regions determined based on the region extent bits. Alternatively, previously determined value numbers may provide much of the information collected by the two passes. In such a case, a single pass over the program code may locate features that limit lock coarsening opportunities. A set of synchronization operations that can be removed may then be determined and used when modifying the program code to coarsen locking regions.Type: GrantFiled: March 31, 2009Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Mark Graham Stoodley, Vijay Sundaresan
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Patent number: 8056067Abstract: Data processing delay is reduced during data processing, using compiler optimization. Blocks of code are scanned in an order from blocks recurring most often to blocks recurring least often. In an order from blocks recurring most often to block recurring least often, shifts are inserted before arithmetic references, such that a previous use of the arithmetic reference does not require a shift, shifts are inserted after each memory use such that the next use of the memory does not require a shift, and shifts are inserted after each arithmetic reference such that the next use of the arithmetic reference requires no shift. In addition, if there is a mismatch between the last shifted amount of any one block and the required initial shifted amount in any of its successors, shifts are inserted to make up for the mismatch.Type: GrantFiled: September 29, 2006Date of Patent: November 8, 2011Assignee: International Business Machines CorporationInventors: Michael Fulton, Allan Kielstra, Vijay Sundaresan
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Patent number: 8024720Abstract: A computer implemented method, computer usable program code, and a data processing system for selecting a candidate implementation of a virtual overridden method for inlining into a calling method. A determination as to which implementation of a virtual overridden method to inline is made based on its relative “hotness” compared to the other implementations of the same method. The relative hotness can be inferred from the invocation count and sampling count that the virtual machine and the just-in-time compiler already collect for other purposes, that is, without collecting and storing of call-edge profiling information. When a method is being compiled and it is identified that the method contains a call to an overridden method, a candidate for inlining from among the implementations of the overridden method is selected based on relative hotness values. The candidate implementation of the overridden method is then inlined, with a guard, into the calling method.Type: GrantFiled: April 17, 2006Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventors: Derek Bruce Inglis, Vijay Sundaresan, Dina Tal
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Publication number: 20110107068Abstract: One embodiment of a method for eliminating redundant operations establishing common properties includes identifying a first virtual register storing a first value having a common property. The method may assign the first virtual register to use a real register. The method may further identify a second virtual register storing a second value also having the common property. The method may assign the second virtual register to use the same real register after the first value is no longer live. As a result of assigning the second virtual register to the first real register, the method may eliminate an operation configured to establish the common property for the second virtual register since this operation is redundant and is no longer needed.Type: ApplicationFiled: October 26, 2010Publication date: May 5, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: MARCEL MITRAN, KISHOR V. PATIL, JORAN S. C. SIU, MARK G. STOODLEY, VIJAY SUNDARESAN
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Patent number: 7937552Abstract: Illustrative embodiments provide a computer implemented method, an apparatus in the form of a data processing system and a computer program product for cache line reservations. In one embodiment, the computer implemented method comprises, dividing a memory into an unreserved section and a set of reserved sections. The method performs selected allocations of the memory only from the set of reserved sections, and performing un-selected allocations of the memory from the unreserved section. The method further mapping a specified selected allocation of the memory to a same corresponding line of cache memory each time the mapping for the specified selected allocation of the memory occurs, thereby maintaining locality.Type: GrantFiled: November 20, 2007Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: Daryl James Maier, Marcel Mitran, Vijay Sundaresan
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Publication number: 20110055819Abstract: A computer-implemented method, system, and computer program product for performing object collocation on a computer system are provided. The method includes analyzing a sequence of computer instructions for object allocations and uses of the allocated objects. The method further includes creating an allocation interference graph of object allocation nodes with edges indicating pairs of allocations to be omitted from collocation. The method also includes coloring the allocation interference graph such that adjacent nodes are assigned different colors, and creating an object allocation at a program point prior to allocations of a selected color from the allocation interference graph. The method additionally includes storing an address associated with the created object allocation in a collocation pointer, and replacing a use of each allocation of the selected color with a use of the collocation pointer to collocate multiple objects.Type: ApplicationFiled: August 17, 2010Publication date: March 3, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick Doyle, Pramod Ramarao, Vijay Sundaresan
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Patent number: 7823150Abstract: Under the present invention, a locking primitive associated with a shared data object is automatically transformed to allow multiple read-only locks if certain conditions are met. To this extent, when a read-only lock on a shared data object is desired, a thread identifier of an object header lock word (hereinafter “lock word”) associated with the shared data object is examined to determine if a read-write lock on the shared data object already exists. If not, then the thread identifier is set to a predetermined value indicative of read-only locks, and a thread count in the lock word is incremented. If another thread attempts a read-only lock, the thread identifier will be examined for the predetermined value. If it is present, the thread count will be incremented again, and a second read-only lock will be simultaneously established.Type: GrantFiled: January 25, 2005Date of Patent: October 26, 2010Assignee: International Business Machines CorporationInventors: Nikola Grcevski, Kevin A. Stoodley, Mark G. Stoodley, Vijay Sundaresan
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Patent number: 7770163Abstract: Synchronizing clones of a software method to be executed by at least one thread while the software method is compiled. The software method is cloned to generate a software method clone. At least one transition is created between equivalent program points in the software method and the software method clone. A lock object is inserted into one of the software method and the software method clone. Then, code that controls the at least one transition between a profiling clone and a non-profiling clone is changed to access thread-local storage. The non-profiling clone is the one of the software method and the software method clone into which the lock object was inserted. A first synchronization operation is performed at or after an entry point of the non-profiling clone. Then, the profiling clone is executed using thread-local storage.Type: GrantFiled: March 24, 2006Date of Patent: August 3, 2010Assignee: International Business Machines CorporationInventors: Kevin Alexander Stoodley, Vijay Sundaresan
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Patent number: 7661098Abstract: Dynamically compiled computer program code containing virtual calls can reduce the options for optimization during compilation. A virtual call can affect sections of the program code that are compiled subsequent to the virtual call. Therefore, the state under which the effected sections are to be executed may not be known at the time of compilation thus complicating optimization of these sections. If assumptions are made about the state of an effected section, then this section can be optimized. In order to provide proper operation of the executing program code given the optimization, a check of the validity of the assumptions is performed prior to execution of the optimized section. If an assumption does not hold true then the original un-optimized section can be executed to reduce adverse program performance.Type: GrantFiled: May 13, 2004Date of Patent: February 9, 2010Assignee: International Business Machines CorporationInventors: Ali Ijaz Sheikh, Vijay Sundaresan
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Publication number: 20090235240Abstract: Repetitive synchronization in program code is optimized through lock coarsening that is performed subject to a number of constraints. Using a forward pass over the program code followed by a backward pass, region extent bits may be determined that identify the points in the program where object locking can be coarsened. The program code may then be modified to realize coarsened locking regions determined based on the region extent bits. Alternatively, previously determined value numbers may provide much of the information collected by the two passes. In such a case, a single pass over the program code may locate features that limit lock coarsening opportunities. A set of synchronization operations that can be removed may then be determined and used when modifying the program code to coarsen locking regions.Type: ApplicationFiled: March 31, 2009Publication date: September 17, 2009Applicant: International Business Machines CorporationInventors: Mark Graham Stoodley, Vijay Sundaresan
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Patent number: 7574704Abstract: A system and method for reorganizing source code using frequency based instruction loop replication are provided. Code is reorganized based on the frequency of execution of blocks of the code so as to favor frequently executed blocks of code over rarely executed code with regard to subsequent optimizations. Frequently executed blocks of instructions are maintained within loop/switch statements and rarely executed blocks of instructions are removed from the loop/switch statements. The rarely executed blocks of instructions may be replicated after the loop/switch statement with a reference back to the loop/switch statement. In this way, when subsequent loop/switch statement optimizations are applied, the frequently executed blocks of instructions within the loop are more likely to benefit from such optimizations since the negative influence of the rarely executed blocks of instructions has been removed.Type: GrantFiled: October 21, 2004Date of Patent: August 11, 2009Assignee: International Business Machines CorporationInventors: Mike Stephen Fulton, Christopher B. Larsson, Vijay Sundaresan
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Patent number: 7552428Abstract: Repetitive synchronization in program code is optimized through lock coarsening that is performed subject to a number of constraints. Using a forward pass over the program code followed by a backward pass, region extent bits may be determined that identify the points in the program where object locking can be coarsened. The program code may then be modified to realize coarsened locking regions determined based on the region extent bits. Alternatively, previously determined value numbers may provide much of the information collected by the two passes. In such a case, a single pass over the program code may locate features that limit lock coarsening opportunities. A set of synchronization operations that can be removed may then be determined and used when modifying the program code to coarsen locking regions.Type: GrantFiled: May 27, 2004Date of Patent: June 23, 2009Assignee: International Business Machines CorporationInventors: Mark Graham Stoodley, Vijay Sundaresan
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Publication number: 20090132780Abstract: Illustrative embodiments provide a computer implemented method, an apparatus in the form of a data processing system and a computer program product for cache line reservations. In one embodiment, the computer implemented method comprises, dividing a memory into an unreserved section and a set of reserved sections. The method performs selected allocations of the memory only from the set of reserved sections, and performing un-selected allocations of the memory from the unreserved section. The method further mapping a specified selected allocation of the memory to a same corresponding line of cache memory each time the mapping for the specified selected allocation of the memory occurs, thereby maintaining locality.Type: ApplicationFiled: November 20, 2007Publication date: May 21, 2009Inventors: Daryl James Maier, Marcel Mitran, Vijay Sundaresan
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Publication number: 20090125893Abstract: The illustrative embodiments described herein provide a computer-implemented method, apparatus, and computer program product for managing variable assignments in a program. The process identifies a set of variable assignments that is live on a portion of paths to form a set of identified variable assignments. Each of the set of identified variable assignments assign a value to at least one variable of a set of variables. The process determines a set of program points at which the set of identified variable assignments is live on all paths. The process also moves the set of identified variable assignments to the set of program points in response to determining that the set of identified variable assignments is movable to the set of program points.Type: ApplicationFiled: November 13, 2007Publication date: May 14, 2009Inventors: Reid T. Copeland, Mark Graham Stoodley, Vijay Sundaresan, Ning Thomas Wong
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Patent number: 7493610Abstract: A system and method for optimizing program code in dynamic languages includes gathering hot-type information from a program by employing inferencing or profiling to get the hot-type information for operator uses, and inserting guards in the program based on data flow in the program to guard against propagation failures during runtime where preconditions are violated or where the propagation is unlikely to return. The program is versioned into global versions including a hot path version and a cold path version, where the hot path version is expected to be executed if the values of variables in the code are expected types, and other exceptional cases are handled by the cold path version as triggered by the guards. Compiler optimizations are performed to remove redundant representations of values, and heavy overloading of operators to provide an optimized compiling of the code.Type: GrantFiled: March 27, 2008Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Tamiya Onodera, Vijay Sundaresan, Michiaki Tatsubori, Akihiko Tozawa
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Publication number: 20080250396Abstract: An improved system and computer programming product for acquisition and release of locks within a software program is disclosed. In an exemplary embodiment, a lock within a loop is transformed by relocating acquisition and release instructions from within the loop to positions outside the loop. This may significantly decrease unnecessarily lock acquisition and release during execution of the software program. In order to avoid contention problems which may arise from acquiring and keeping a lock on an object over a relatively long period of time, a contention test may be inserted into the loop. Such a contention test may temporarily release the lock if another thread in the software program requires access to the locked object.Type: ApplicationFiled: June 9, 2008Publication date: October 9, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Nikola Grcevski, Kevin Alexander Stoodley, Mark Graham Stoodley, Vijay Sundaresan
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Publication number: 20080189692Abstract: Under the present invention, program code is examined (statically or dynamically) for characteristics indicative of a potential to generate multiple threads. If none are found, single threaded optimization(s) such as desynchronization, optimization of globals, etc., can be implemented. In addition, if the program code is later revealed to have the potential to generate multiple threads, the single threaded optimization(s) can be corrected to avoid incorrect execution.Type: ApplicationFiled: April 9, 2008Publication date: August 7, 2008Inventors: Derek B. Inglis, Trent A. Gray-Donald, Kevin A. Stoodley, Vijay Sundaresan